Server BIOS Settings
Cisco UCS provides two methods for making global modifications to the BIOS settings on servers in an Cisco UCS domain. You can create one or more BIOS policies that include a specific grouping of BIOS settings that match the needs of a server or set of servers, or you can use the default BIOS settings for a specific server platform.
Both the BIOS policy and the default BIOS settings for a server platform enable you to fine tune the BIOS settings for a server managed by Cisco UCS Manager.
Depending upon the needs of the data center, you can configure BIOS policies for some service profiles and use the BIOS defaults in other service profiles in the same Cisco UCS domain, or you can use only one of them. You can also use Cisco UCS Manager to view the actual BIOS settings on a server and determine whether they are meeting current needs.
Note |
Cisco UCS Manager pushes BIOS configuration changes through a BIOS policy or default BIOS settings to the Cisco Integrated Management Controller (CIMC) buffer. These changes remain in the buffer and do not take effect until the server is rebooted. We recommend that you verify the support for BIOS settings in the server that you want to configure. Some settings, such as Mirroring Mode for RAS Memory, are not supported by all Cisco UCS servers. |
Main BIOS Settings
The following table lists the main server BIOS settings that you can configure through a BIOS policy or the default BIOS settings:
Name | Description |
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Properties |
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Reboot on BIOS Settings Change |
When the server is rebooted after you change one or more BIOS settings. If you enable this setting, the server is rebooted according to the maintenance policy in the server's service profile. For example, if the maintenance policy requires user acknowledgment, the server is not rebooted and the BIOS changes are not applied until a user acknowledges the pending activity. If you do not enable this setting, the BIOS changes are not applied until the next time the server is rebooted, whether as a result of another server configuration change or a manual reboot. |
BIOS Setting |
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Quiet Boot |
What the BIOS displays during Power On Self-Test (POST). This can be one of the following:
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POST error pause |
What happens when the server encounters a critical error during POST. This can be one of the following:
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Resume on AC power loss |
How the server behaves when power is restored after an unexpected power loss. This can be one of the following:
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Front panel lockout |
Whether the power and reset buttons on the front panel are ignored by the server. This can be one of the following:
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CDN Control |
Consistent Device Naming allows Ethernet interfaces to be named in a consistent manner. This makes Ethernet interface names more uniform, easy to identify, and persistent when adapter or other configuration changes are made. Whether consistent device naming is enabled or not. This can be one of the following:
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Processor BIOS Settings
The following table lists the processor BIOS settings that you can configure through a BIOS policy or the default BIOS settings:
Name | Description | ||
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Intel Turbo Boost Tech |
Whether the processor uses Intel Turbo Boost Technology, which allows the processor to automatically increase its frequency if it is running below power, temperature, or voltage specifications. This can be one of the following:
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Enhanced Intel SpeedStep Tech |
Whether the processor uses Enhanced Intel SpeedStep Technology, which allows the system to dynamically adjust processor voltage and core frequency. This technology can result in decreased average power consumption and decreased average heat production. This can be one of the following:
We recommend that you contact your operating system vendor to make sure your operating system supports this feature. |
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Intel HyperThreading Tech |
Whether the processor uses Intel Hyper-Threading Technology, which allows multithreaded software applications to execute threads in parallel within each processor. This can be one of the following:
We recommend that you contact your operating system vendor to make sure the operating system supports this feature. |
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Intel Speed Select |
Allows improved CPU performance by using Intel Speed Select technology to tune the CPU to run at one of three operating profiles, based on number of logical processor cores, frequency, and TDP thread setting, to improve performance over the basic Platform Default setting. These profiles correspond to High, Medium, and Low Core settings and can be one of the following:
Low core profiles enable the CPU to run at maximum frequency. Refer to Intel Speed Select sample settings. |
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Core Multi Processing |
Sets the state of logical processor cores per CPU in a package. If you disable this setting, Intel Hyper Threading technology is also disabled. This can be one of the following:
We recommend that you contact your operating system vendor to make sure your operating system supports this feature. |
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Execute Disable Bit |
Classifies memory areas on the server to specify where the application code can execute. As a result of this classification, the processor disables code execution if a malicious worm attempts to insert code in the buffer. This setting helps to prevent damage, worm propagation, and certain classes of malicious buffer overflow attacks. This can be one of the following:
We recommend that you contact your operating system vendor to make sure your operating system supports this feature. |
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Intel Virtualization Technology |
Whether the processor uses Intel Virtualization Technology, which allows a platform to run multiple operating systems and applications in independent partitions. This can be one of the following:
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Hardware Prefetcher |
Whether the processor allows the Intel hardware prefetcher to fetch streams of data and instruction from memory into the unified second-level cache when necessary. This can be one of the following:
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Adjacent Cache Line Prefetcher |
Whether the processor fetches cache lines in even/odd pairs instead of fetching just the required line. This can be one of the following:
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DCU Streamer Prefetch |
Whether the processor uses the DCU IP Prefetch mechanism to analyze historical cache access patterns and preload the most relevant lines in the L1 cache. This can be one of the following:
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DCU IP Prefetcher |
Whether the processor uses the DCU IP Prefetch mechanism to analyze historical cache access patterns and preload the most relevant lines in the L1 cache. This can be one of the following:
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KTI Prefetch drop-down list |
KTI prefetch is a mechanism to get the memory read started early on a DDR bus. This can be one of the following:
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LLC Prefetch drop-down list |
Whether the processor uses the LLC Prefetch mechanism to fetch the date into the LLC. This can be one of the following:
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XPT Prefetch drop-down list |
Whether XPT prefetch is used to enable a read request sent to the last level cache to issue a copy of that request to the memory controller prefetcher. This can be one of the following:
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Direct Cache Access |
Allows processors to increase I/O performance by placing data from I/O devices directly into the processor cache. This setting helps to reduce cache misses. This can be one of the following:
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Processor C State |
Whether the system can enter a power savings mode during idle periods. This can be one of the following:
We recommend that you contact your operating system vendor to make sure your operating system supports this feature. |
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Processor C1E |
Allows the processor to transition to its minimum frequency upon entering C1. This setting does not take effect until after you have rebooted the server. This can be one of the following:
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Processor C3 Report |
Whether the processor sends the C3 report to the operating system. This can be one of the following:
On the Cisco UCS B440 Server, the BIOS Setup menu uses enabled and disabled for these options. If you specify acpi-c2 or acpi-c2, the server sets the BIOS value for that option to enabled. |
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Processor C6 Report |
Whether the processor sends the C6 report to the operating system. This can be one of the following:
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Processor C7 Report drop-down list |
Whether the processor sends the C7 report to the operating system. This can be one of the following:
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Processor CMCI drop-down list |
Enables CMCI generation. This can be one of the following:
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CPU Performance |
Sets the CPU performance profile for the server. This can be one of the following:
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Max Variable MTRR Setting |
Allows you to select the number of mean time to repair (MTRR) variables. This can be one of the following:
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Local X2 APIC |
Allows you to set the type of Application Policy Infrastructure Controller (APIC) architecture. This can be one of the following:
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Power Technology |
Enables you to configure the CPU power management settings for the following options:
Power Technology can be one of the following:
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Energy Performance |
Allows you to determine whether system performance or energy efficiency is more important on this server. This can be one of the following:
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Frequency Floor Override |
Whether the CPU is allowed to drop below the maximum non-turbo frequency when idle. This can be one of the following:
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P STATE Coordination |
Allows you to define how BIOS communicates the P-state support model to the operating system. There are 3 models as defined by the Advanced Configuration and Power Interface (ACPI) specification.
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DRAM Clock Throttling |
Allows you to tune the system settings between the memory bandwidth and power consumption. This can be one of the following:
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Channel Interleaving |
Whether the CPU divides memory blocks and spreads contiguous portions of data across interleaved channels to enable simultaneous read operations. This can be one of the following:
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Rank Interleaving |
Whether the CPU interleaves physical ranks of memory so that one rank can be accessed while another is being refreshed. This can be one of the following:
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Sub NUMA Clustering drop-down list |
Whether the CPU supports sub NUMA clustering, in which the tag directory and the memory channel are always in the same region. This can be one of the following:
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IMC Interleave drop-down list |
This BIOS option controls the interleaving between the Integrated Memory Controllers (IMCs).
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Memory Interleaving |
Whether the CPU interleaves the physical memory so that the memory can be accessed while another is being refreshed. This can be one of the following:
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Demand Scrub |
Whether the system corrects single bit memory errors encountered when the CPU or I/O makes a demand read. This can be one of the following:
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Patrol Scrub |
Whether the system actively searches for, and corrects, single bit memory errors even in unused portions of the memory on the server. This can be one of the following:
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DCPMM Firmware Downgrade |
This can be one of the following:
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Configurable TDP Control |
Allows you to set customized value for Thermal Design Power (TDP). This can be one of the following:
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Altitude |
The approximate number of meters above sea level at which the physical server is installed. This can be one of the following:
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Package C State Limit |
The amount of power available to the server components when they are idle. This can be one of the following:
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CPU Hardware Power Management drop-down list |
Enables processor Hardware Power Management (HWPM). This can be one of the following:
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Energy Performance Tuning drop-down list |
Determines if the BIOS or Operating System can turn on the energy performance bias tuning. The options are BIOS and OS.
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Workload Configuration drop-down list |
This feature allows for workload optimization. The options are Balanced and I/O Sensitive:
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Core Performance Boost drop-down list |
Whether the AMD processor increases its frequency on some cores when it is idle or not being used much. This can be one of the following:
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Global C-state Control drop-down list |
Whether the AMD processors control IO-based C-state generation and DF C-states This can be one of the following:
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L1 Stream HW Prefetcher drop-down list |
Whether the processor allows the AMD hardware prefetcher to speculatively fetch streams of data and instruction from memory into the L1 cache when necessary. This can be one of the following:
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L2 Stream HW Prefetcher drop-down list |
Whether the processor allows the AMD hardware prefetcher to speculatively fetch streams of data and instruction from memory into the L2 cache when necessary. This can be one of the following:
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AMD Memory Interleaving drop-down list |
Whether the AMD CPU interleaves the physical memory so that the memory can be accessed while another is being refreshed. This controls fabric level memory interleaving. Channel, die and socket have requirements based on memory populations and will be ignored if the memory does not support the selected option.This can be one of the following:
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AMD Memory Interleaving Size drop-down list |
Determines the size of the memory blocks to be interleaved. It also determines the starting address of the interleave (bit 8,9,10 or 11). This can be one of the following:
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Chipselect Interleaving drop-down list |
Whether memory blocks across the DRAM chip selects for node 0 are interleaved. This can be one of the following:
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Bank Group Swap drop-down list |
Determines how physical addresses are assigned to applications. This can be one of the following:
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Determinism Slider drop-down list |
Allows AMD processors to determine how to operate. This can be one of the following:
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IOMMU drop-down list |
Input Output Memory Management Unit (IOMMU) allows AMD processors to map virtual addresses to physical addresses. This can be one of the following:
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Downcore control drop-down list |
Allows AMD processors to disable cores and, thus, select how many cores to enable. This can be one of the following:
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SVM Mode drop-down list |
Whether the processor uses AMD Secure Virtual Machine Technology. This can be one of the following: This can be one of the following:
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SMT Mode drop-down list |
Whether the processor uses AMD Simultaneous MultiThreading Technology, which allows multithreaded software applications to execute threads in parallel within each processor. This can be one of the following:
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SMEE drop-down list |
Whether the processor uses the Secure Memory Encryption Enable (SMEE) function, which provides memory encryption support. This can be one of the following:
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Intel Directed I/O BIOS Settings
The following table lists the Intel Directed I/O BIOS settings that you can configure through a BIOS policy or the default BIOS settings:
Name | Description | ||
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Intel VT for directed IO |
Whether the processor uses Intel Virtualization Technology for Directed I/O (VT-d). This can be one of the following:
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Intel VTD interrupt Remapping |
Whether the processor supports Intel VT-d Interrupt Remapping. This can be one of the following:
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Intel VTD coherency support |
Whether the processor supports Intel VT-d Coherency. This can be one of the following:
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Intel VTD ATS support |
Whether the processor supports Intel VT-d Address Translation Services (ATS). This can be one of the following:
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Intel VTD pass through DMA support |
Whether the processor supports Intel VT-d Pass-through DMA. This can be one of the following:
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RAS Memory BIOS Settings
The following table lists the RAS memory BIOS settings that you can configure through a BIOS policy or the default BIOS settings:
Name | Description |
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Memory RAS configuration |
How the memory reliability, availability, and serviceability (RAS) is configured for the server. This can be one of the following:
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NUMA optimized |
Whether the BIOS supports NUMA. This can be one of the following:
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Mirroring Mode |
Memory mirroring enhances system reliability by keeping two identical data images in memory. This option is only available if you choose the mirroring option for Memory RAS Config. It can be one of the following:
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Sparing Mode |
Sparing optimizes reliability by holding memory in reserve so that it can be used in case other DIMMs fail. This option provides some memory redundancy, but does not provide as much redundancy as mirroring. The available sparing modes depend on the current memory population. This option is only available if you choose sparing option for Memory RAS Config. It can be one of the following:
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LV DDR Mode |
Whether the system prioritizes low voltage or high frequency memory operations. This can be one of the following:
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DRAM Refresh Rate set dram-refresh-rate-config dram-refresh |
The refresh interval rate for internal memory. This can be one of the following:
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DDR3 Voltage Selection |
The voltage to be used by the dual-voltage RAM. This can be one of the following:
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Serial Port BIOS Settings
The following table lists the serial port BIOS settings that you can configure through a BIOS policy or the default BIOS settings:
Name | Description |
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Serial port A enable |
Whether serial port A is enabled or disabled. This can be one of the following:
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USB BIOS Settings
The following table lists the USB BIOS settings that you can configure through a BIOS policy or the default BIOS settings:
Name | Description |
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Make Device Non Bootable |
Whether the server can boot from a USB device. This can be one of the following:
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Legacy USB Support |
Whether the system supports legacy USB devices. This can be one of the following:
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USB Idle Power Optimizing Setting |
Whether the USB Idle Power Optimizing setting is used to reduce USB EHCI idle power consumption. Depending upon the value you choose, this setting can have an impact on performance. This can be one of the following:
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USB Front Panel Access Lock |
USB front panel access lock is configured to enable or disable the front panel access to USB ports. This can be one of the following:
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Port 60/64 Emulation |
Whether the system supports 60h/64h emulation for complete USB keyboard legacy support. This can be one of the following:
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USB Port Front |
Whether the front panel USB devices are enabled or disabled. This can be one of the following:
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USB Port Internal |
Whether the internal USB devices are enabled or disabled. This can be one of the following:
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USB Port KVM |
Whether the KVM ports are enabled or disabled. This can be one of the following:
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USB Port Rear |
Whether the rear panel USB devices are enabled or disabled. This can be one of the following:
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USB Port SD Card |
Whether the SD card drives are enabled or disabled. This can be one of the following:
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USB Port VMedia |
Whether the virtual media devices are enabled or disabled. This can be one of the following:
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All USB Devices |
Whether all physical and virtual USB devices are enabled or disabled. This can be one of the following:
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xHCI Mode |
Whether xHCI mode is enabled or disabled. This can be one of the following:
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PCI Configuration BIOS Settings
The following table lists the PCI configuration BIOS settings that you can configure through a BIOS policy or the default BIOS settings:
Name | Description | ||||
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Maximum memory below 4GB |
Whether the BIOS maximizes memory usage below 4GB for an operating system without PAE support, depending on the system configuration. This can be one of the following:
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Memory mapped IO above 4GB |
Whether to enable or disable memory mapped I/O of 64-bit PCI devices to 4GB or greater address space. Legacy option ROMs are not able to access addresses above 4GB. PCI devices that are 64-bit compliant but use a legacy option ROM may not function correctly with this setting enabled. This can be one of the following:
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VGA Priority |
Allows you to set the priority for VGA graphics devices if multiple VGA devices are found in the system. This can be one of the following:
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ASPM Support |
Allows you to set the level of ASPM (Active Power State Management) support in the BIOS. This can be one of the following:
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BME DMA Mitigation Support |
Allows you to disable the PCI BME bit to mitigate the threat from an unauthorized external DMA. This can be one of the following:
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QPI BIOS Settings
The following table lists the QPI BIOS settings that you can configure through a BIOS policy or the default BIOS settings:
Name | Description |
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QPI Link Frequency Select |
The Intel QuickPath Interconnect (QPI) link frequency, in megatransfers per second (MT/s). This can be one of the following:
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QPI Snoop Mode |
This can be one of the following:
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LOM and PCIe Slots BIOS Settings
The following table lists the USB BIOS settings that you can configure through a BIOS policy or the default BIOS settings:
Name | Description |
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PCIe Slot SAS OptionROM |
Whether Option ROM is available on the SAS port. This can be one of the following:
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PCIe Slot n Link Speed |
This option allows you to restrict the maximum speed of an adapter card installed in PCIe slot n. This can be one of the following:
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PCIe Slot n OptionROM |
Whether Option ROM is available on the port. This can be one of the following:
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PCIe Slot HBA OptionROM |
Whether Option ROM is available on the HBA port. This can be one of the following:
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PCIe Slot MLOM OptionROM |
Whether Option ROM is available on the MLOM port. This can be one of the following:
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PCIe Slot Nx OptionROM |
Whether Option ROM is available on the port. This can be one of the following:
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PCIe 10G LOM 2 Link |
Whether Option ROM is available on the 10G LOM port. This can be one of the following:
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PCI ROM CLP |
PCI ROM Command Line Protocol (CLP) controls the execution of different Option ROMs such as PxE and iSCSI that are present in the card. By default, it is disabled.
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SIOC1 Option ROM |
Whether the server can use Option ROM present in System IO Controller 1 (SIOC1). This can be one of the following:
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SIOC2 Option ROM |
Whether the server can use Option ROM present in System IO Controller 2 (SIOC2). This can be one of the following:
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SBMEZZ1 Option ROM |
Whether the server can use Option ROM present in SBMezz1 controller. This can be one of the following:
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SBMEZZ2 Option ROM |
Whether the server can use Option ROM present in SBMezz2 controller. This can be one of the following:
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IOESlot1 OptionROM |
Whether option ROM is enabled on the IOE slot 1. This can be one of the following:
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IOEMEZZ 1 OptionROM |
Whether option ROM is enabled on the IOE Mezz1. This can be one of the following:
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IOE Slot2 Option ROM |
Whether option ROM is enabled on the IOE slot 2. This can be one of the following:
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IO ENVME1 Option ROM |
Whether option ROM is enabled on the IOE NVMe1. This can be one of the following:
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IO ENVME2 Option ROM |
Whether option ROM is enabled on the IOE NVMe2. This can be one of the following:
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SBNVME1 Option ROM |
Whether the server can use Option ROM present in SBNVMe1 controller. This can be one of the following:
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PCIe Slot MRAID OptionROM drop-down list |
Whether Option ROM is available on the MRAID port. This can be one of the following:
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PCIe Slot RAID OptionROM |
Whether Option ROM is available on the RAID port. This can be one of the following:
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PCIe Slot Rear Nvmen OptionRom |
Whether Option ROM is available on the Rear NVMEn port. This can be one of the following:
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Rear NVME1 Link Speed |
This option allows you to restrict the maximum speed of an NVME card installed in the rear PCIe slot 1. This can be one of the following:
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Rear NVME2 Link Speed |
This option allows you to restrict the maximum speed of an NVME card installed in the rear PCIe slot 2. This can be one of the following:
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Front NVME1 Link Speed |
This option allows you to restrict the maximum speed of an NVME card installed in the front PCIe slot 1. This can be one of the following:
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Front NVME2 Link Speed |
This option allows you to restrict the maximum speed of an NVME card installed in the front PCIe slot 2. This can be one of the following:
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HBA Link Speed |
This option allows you to restrict the maximum speed of an HBA card. This can be one of the following:
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MLOM Link Speed |
This option allows you to restrict the maximum speed of an MLOM adapter. This can be one of the following:
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MRAID Link Speed |
This option allows you to restrict the maximum speed of MRAID. This can be one of the following:
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RAID Link Speed |
This option allows you to restrict the maximum speed of RAID. This can be one of the following:
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All Onboard LOM |
Whether all onboard LOM ports are enabled or disabled. This can be one of the following:
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LOM Port 1 OptionRom |
Whether Option ROM is available on the LOM port 1. This can be one of the following:
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LOM Port 2 OptionRom |
Whether Option ROM is available on the LOM port 2. This can be one of the following:
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Slot n State |
The state of the adapter card installed in PCIe slot n. This can be one of the following:
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SBNVMe1 OptionROM |
Whether the server can use Option ROM present in SBNVMe1 controller. This can be one of the following:
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SBNVMe2 OptionROM |
Whether the server can use Option ROM present in SBNVMe2 controller. This can be one of the following:
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SIOCNVMe1 OptionROM |
Whether the server can use Option ROM present in SIOCNVMe1 controller. This can be one of the following:
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SIOCNVMe2 OptionROM |
Whether the server can use Option ROM present in SIOCNVMe2 controller. This can be one of the following:
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SBLom1 OptionROM |
Whether the server can use Option ROM present in the SBLom1 controller. This can be one of the following:
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SBNVMen Link Speed |
Link speed for SBNVMe slot n. This can be one of the following:
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SIOCNVMen Link Speed |
Link speed for SIOCNVMe slot n. This can be one of the following:
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SIOCn Link Speed |
Link speed for SIOC slot n. This can be one of the following:
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SBMezzn Link Speed |
Link speed for SBMezz slot n. This can be one of the following:
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IOESlotn Link Speed |
Link speed for IOE slot n. This can be one of the following:
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IOEMezzn Link Speed |
Link speed for IOEMezz slot n. This can be one of the following:
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IOENVMen Link Speed |
Link speed for IOENVMe slot n. This can be one of the following:
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CDN Support for LOMs |
Whether the Ethernet Networking Identifier naming convention is according to Consistent Device Naming (CDN) or the traditional way of naming conventions. This can be one of the following:
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VMD Enable |
Whether NVMe SSDs that are connected to the PCIe bus can be hot swapped. It also standardizes the LED status light on these drives. LED status lights can be optionally programmed to display specific Failure indicator patterns. This can be one of the following:
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ACS Control SLOT-n n = 11 to 14 |
Access Control Services (ACS) allow the processor to enable or disable peer-to-peer communication between multiple devices for Control Slot n. This can be one of the following:
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PCIe Slot GPUn OptionROM drop-down list Only for Cisco UCS C480 M5 ML Server |
Whether the Option ROM is enabled on GPU slot n. n is the slot number, which can be numbered 1 through 8. This can be one of the following:
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ACS Control GPU-n n = 1 to 8 |
Access Control Services (ACS) allow the processor to enable or disable peer-to-peer communication between multiple devices for GPUs. This can be one of the following:
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Graphics Configuration BIOS Settings
The following tables list the graphics configuration BIOS settings that you can configure through a BIOS policy or the default BIOS settings:
Name | Description |
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Integrated Graphics |
Enables integrated graphics. This can be one of the following:
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Integrated Graphics Aperture Size |
Allows you to set the size of mapped memory for the integrated graphics controller. This can be one of the following:
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Onboard Graphics |
Enables onboard graphics (KVM). This can be one of the following:
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Boot Options BIOS Settings
The following table lists the boot options BIOS settings that you can configure through a BIOS policy or the default BIOS settings:
Name | Description |
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Boot option retry |
Whether the BIOS retries NON-EFI based boot options without waiting for user input. This can be one of the following:
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SAS RAID |
Whether the Intel SAS Entry RAID Module is enabled. This can be one of the following:
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SAS RAID module |
How the Intel SAS Entry RAID Module is configured. This can be one of the following:
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Onboard SCU Storage Support |
Whether the onboard software RAID controller is available to the server. This can be one of the following:
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Cool Down Time (sec) drop-down list |
The time to wait (in seconds) before the next boot attempt. This can be one of the following:
This token is valid only when the Boot Option Retry token has been enabled. |
Number of Retries drop-down list |
Number of attempts to boot. This can be one of the following:
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P-SATA mode drop-down list |
This options allows you to select the P-SATA mode. This can be one of the following:
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Power On Password drop-down list |
This token requires that you set a BIOS password before using the F2 BIOS configuration. If enabled, password needs to be validated before you access BIOS functions such as IO configuration, BIOS set up, and booting to an operating system using BIOS. It can be one of the following:
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IPV6 PXE Support drop-down list |
Enables or disables IPV6 support for PXE. This can be one of the following
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Adaptive Memory Training drop-down list |
When this token is enabled, the BIOS saves the memory training results (optimized timing/voltage values) along with CPU/memory configuration information and reuses them on subsequent reboots to save boot time. The saved memory training results are used only if the reboot happens within 24 hours of the last save operation. This can be one of the following:
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BIOS Techlog Level BIOS Tech Message Level Control (for C125 M5) |
Enabling this token allows the BIOS Tech log output to be controlled at more a granular level. This reduces the number of BIOS Tech log messages that are redundant, or of little use. This can be one of the following:
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OptionROM Launch Optimization |
The Option ROM launch is controlled at the PCI Slot level, and is enabled by default. In configurations that consist of a large number of network controllers and storage HBAs having Option ROMs, all the Option ROMs may get launched if the PCI Slot Option ROM Control is enabled for all. However, only a subset of controllers may be used in the boot process. When this token is enabled, Option ROMs are launched only for those controllers that are present in boot policy. This can be one of the following:
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Note |
BIOS parameter virtualization capability in Cisco UCS Manager maps a unified set of BIOS settings in a service profile to the actual BIOS supporting parameters. However, not all BIOS setting items are applicable to every server model/platform. When you create a custom BIOS policy and have the Boot Option Retry selected, and when there is no bootable option available, the reboot fails on the Cisco UCS B420 M3 or Cisco UCS B420 M4 servers and Cisco UCS Manager displays this message : Reboot and Select proper Boot device or Insert Boot Media in selected Boot device and press a key. You must manually set a boot option after the boot path is corrected, in order to enable the servers to reboot after a power outage. For more information about BIOS default server policies and the BIOS options and their default settings, see BIOS Policy and Server BIOS Settings. |
Server Management BIOS Settings
The following tables list the server management BIOS settings that you can configure through a BIOS policy or the default BIOS settings:
General Settings
Name | Description |
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Assert NMI on SERR |
Whether the BIOS generates a non-maskable interrupt (NMI) and logs an error when a system error (SERR) occurs. This can be one of the following:
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Assert NMI on PERR |
Whether the BIOS generates a non-maskable interrupt (NMI) and logs an error when a processor bus parity error (PERR) occurs. This can be one of the following:
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OS Boot Watchdog Timer |
Whether the BIOS programs the watchdog timer with a predefined timeout value. If the operating system does not complete booting before the timer expires, the CIMC resets the system and an error is logged. This can be one of the following:
This feature requires either operating system support or Intel Management software. |
OS Boot Watchdog Timer Policy |
What action the system takes if the watchdog timer expires. This can be one of the following:
This option is only available if you enable the OS Boot Watchdog Timer. |
OS Boot Watchdog Timer Timeout |
What timeout value the BIOS uses to configure the watchdog timer. This can be one of the following:
This option is only available if you enable the OS Boot Watchdog Timer. |
FRB-2 Timer |
Whether the FRB-2 timer is used to recover the system if it hangs during POST. This can be one of the following:
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Console Redirection Settings
Name | Description | ||
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Console redirection |
Allows a serial port to be used for console redirection during POST and BIOS booting. After the BIOS has booted and the operating system is responsible for the server, console redirection is irrelevant and has no effect. This can be one of the following:
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Flow Control |
Whether a handshake protocol is used for flow control. Request to Send / Clear to Send (RTS/CTS) helps to reduce frame collisions that can be introduced by a hidden terminal problem. This can be one of the following:
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Baud rate |
What Baud rate is used for the serial port transmission speed. If you disable Console Redirection, this option is not available. This can be one of the following:
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Terminal type |
What type of character formatting is used for console redirection. This can be one of the following:
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Legacy OS redirection |
Whether redirection from a legacy operating system, such as DOS, is enabled on the serial port. This can be one of the following:
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Putty KeyPad set console-redir-config putty-function-keypad |
Allows you to change the action of the PuTTY function keys and the top row of the numeric keypad. This can be one of the following:
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Out of Band Management drop-down list |
Used for Windows Special Administration Control (SAC). This option allows you to configure the COM port 0 that can be used for Windows Emergency Management services. ACPI SPCR table is reported based on this setup option. This can be one of the following:
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Redirection After BIOS POST drop-down list set console-redir-config putty-function-keypad |
Whether BIOS console redirection should be active after BIOS POST is complete and control given to the OS bootloader. This can be one of the following:
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