- Preparing for Broadband Access Aggregation
- Understanding Broadband Access Aggregation
- Providing Protocol Support for Broadband Access Aggregation of PPP over ATM Sessions
- Upstream PPPoX Connection Speed Transfer at LAC
- Providing Session Limit Support
- Monitoring PPPoE Sessions with SNMP
- PPP over Ethernet Client
- PPPoE over VLAN Enhancements Configuration Limit Removal and ATM Support
- Providing Protocol Support for Broadband Access Aggregation of PPPoE Sessions
- PPPoE Client DDR Idle-Timer
- Enabling PPPoE Relay Discovery and Service Selection Functionality
- Establishing PPPoE Session Limits per NAS Port
- Offering PPPoE Clients a Selection of Services During Call Setup
- Providing Connectivity Using ATM Routed Bridge Encapsulation over PVCs
- RBE Client Side Encapsulation with QoS
- Routed Bridge Encapsulation with ATM Virtual Circuit Bundles
- Configuring Cisco Subscriber Service Switch Policies
- Subscriber Profile Support
- Controlling Subscriber Bandwidth
- Configuring the Physical Subscriber Line for RADIUS Access and Accounting
- 1-Port ADSL WAN Interface Card
- 1-Port ADSL WAN Interface for the Cisco IAD2420 Series
- 1-Port ADSL WAN Interface Card for Cisco 2600 Series and Cisco 3600 Series Routers
- ADSL Support in IPv6
- ATM Mode for Two-Wire or Four-Wire SHDSL
- 1-Port G.SHDSL WAN Interface Card for Cisco 2600 Series and Cisco 3600 Series Routers
- G.SHDSL Symmetric DSL Support for Cisco IAD2420 Series IAD
- Monitoring and Retraining on Reception of Loss of Margin Messages
- Virtual Auxiliary Port Feature and Configuration of DSL Settings
- TR-069 Agent
- Finding Feature Information
- Prerequisites for ATM Mode for Two-Wire or Four-Wire SHDSL
- Restrictions for ATM Mode for Two-Wire or Four-Wire SHDSL
- Information About ATM Mode for Two-Wire or Four-Wire SHDSL
- How to Configure ATM Mode for Two-Wire or Four-Wire SHDSL
- Configuration Examples for ATM Mode for Two-Wire or Four-Wire SHDSL
- Additional References
- Feature Information for ATM Mode for Two-Wire or Four-Wire SHDSL
- Glossary
ATM Mode for Two-Wire or Four-Wire SHDSL
This document describes the ATM Mode for Two-Wire or Four-Wire SHDSL feature on the Cisco 1700 series, Cisco 1800 series, Cisco 26xxXM, Cisco 2691, Cisco 2800, Cisco 3700 series, and Cisco 3800 series routers.
The ATM Mode for Two-Wire or Four-Wire SHDSL feature adds 4-wire support in fixed line-rate mode only on a WIC-1SHDSL-V2 or WIC-1SHDSL-V3 interface card. 2-wire mode supports 2-wire line-rate and auto line-rate. This feature builds on the existing features of the Multirate Symmetrical High-Speed Digital Subscriber Line (G.SHDSL) feature supported on the 1-port G.SHDSL WAN interface card (WIC-1SHDSL). The 4-wire feature of G.991.2 doubles the bandwidth in ATM mode and increases usable distance over two pairs of wires.
The WIC-1SHDSL-V2 and WIC-1SHDSL-V3 support ATM on 2-wire and 4-wire line mode. Embedded Operation Channel (EOC) messages support for customer premises equipment (CPE) is provided for 2-wire and 4-wire modes.
- Finding Feature Information
- Prerequisites for ATM Mode for Two-Wire or Four-Wire SHDSL
- Restrictions for ATM Mode for Two-Wire or Four-Wire SHDSL
- Information About ATM Mode for Two-Wire or Four-Wire SHDSL
- How to Configure ATM Mode for Two-Wire or Four-Wire SHDSL
- Configuration Examples for ATM Mode for Two-Wire or Four-Wire SHDSL
- Additional References
- Feature Information for ATM Mode for Two-Wire or Four-Wire SHDSL
- Glossary
Finding Feature Information
Your software release may not support all the features documented in this module. For the latest caveats and feature information, see Bug Search Tool and the release notes for your platform and software release. To find information about the features documented in this module, and to see a list of the releases in which each feature is supported, see the feature information table.
Use Cisco Feature Navigator to find information about platform support and Cisco software image support. To access Cisco Feature Navigator, go to www.cisco.com/go/cfn. An account on Cisco.com is not required.
Prerequisites for ATM Mode for Two-Wire or Four-Wire SHDSL
A G.SHDSL WIC must be installed in the router to match the DSL service to be configured.
Minimum memory recommendations are shown in the table below.
Platform Name |
Image Name |
Flash Memory Recommended |
DRAM Memory Recommended |
---|---|---|---|
Cisco 1700 Series |
IOS IP BASE |
16 MB |
64 MB |
Cisco 1800 Series |
IOS IP BASE |
16 MB |
64 MB |
Cisco 2610XM, Cisco 2611XM, Cisco 2620XM, Cisco 2621XM, Cisco 2650XM, Cisco 2651XM |
IOS IP BASE |
16 MB |
64 MB |
Cisco 2691 |
IOS IP BASE |
32 MB |
128 MB |
Cisco 2800 Series |
IOS IP BASE |
32 MB |
128 MB |
Cisco 3725 |
IOS IP BASE |
32 MB |
128 MB |
Cisco 3745 |
IOS IP BASE |
32 MB |
128 MB |
Cisco 3800 Series |
IOS IP BASE |
32 MB |
128 MB |
Restrictions for ATM Mode for Two-Wire or Four-Wire SHDSL
The auto parameter of the line-mode command on the WIC-1SHDSL-V2 is supported only in Cisco IOS Release 12.3(4)XG1 and later releases.
The standard and enhanced keywords of the line-mode 4-wire command on the WIC-1SHDSL-V3 are supported only in Cisco IOS Release 12.4(2)XA and later releases.
The WIC-1SHDSL-V2 and WIC-1SHDSL-V3 ATM mode for SHDSL does not support ATM adaptation layer 1 (AAL1) and/or circuit emulation service.
ATM adaptation layer 2 (AAL2) is not supported on Cisco 1700 series, Cisco 1800 series, and Cisco 2801 routers.
The ATM mode for SHDSL does not interface with AIM-ATM.
The ATM mode for SHDSL does not support available bit rate (ABR) class of service (CoS).
The ATM mode for SHDSL only supports 23 private virtual circuits (PVC) per WIC.
The WIC-1SHDSL-V2 and WIC-1SHDSL-V3 should be inserted only into onboard WIC slots or NM-2W, NM-1FE2W, NM-1FE1R2W, NM-2FE2W, NM-1FE2W-V2, or NM-2FE2W-V2 network modules. This WIC is not supported in NM-1E2W, NM-1E1R-2W, or NM-2E2W combination network modules.
The WIC-1SHDSL and WIC-1SHDSL-V3 do not support T1/E1 mode.
Note | The WIC-1SHDSL-V2 supports T1/E1 mode in 2-wire mode only, and only on certain routers with specific Cisco IOS images. For information about T1/E1 support on the WIC-1SHDSL-V2, see the T1/E1 Mode for SHDSL document. |
Information About ATM Mode for Two-Wire or Four-Wire SHDSL
- SHDSL Features
- ATM Features
- Interface and Controller Numbering on the Cisco 1721 Router
- Interface Numbering on Cisco 2800 and Cisco 3800 Series Routers
SHDSL Features
Supported SHDSL features are as follows:
ITU G.991.2 support (full support for Annex A and B) - Dying gasp (ITU G.991.2) is supported.
- Terminating wetting current is supported.
- 2-wire mode supports speeds from 192 kbps to 2.304 Mbps in increments of 64 kbps in both fixed and auto line-rate.
- 4-wire mode supports speeds from 384 kbps to 4.608 Mbps in increments of 128 kbps in fixed line-rate only and provides increased rate capability and greater reach.
4-wire mode supports both enhanced and standard mode.
2-wire and 4-wire auto-detection is supported.
Diagnostic loopback mode is supported.
Annex modes A-B, A-B-ANFP, and B-ANFP are supported
ATM Features
The supported ATM features in this release are:
Provide ATM traffic management to enable service providers to manage their core ATM network infrastructures.
Support ATM Class of Service features constant bit rate (CBR), variable bit rate-nonreal time (VBR-nrt), variable bit rate-real time (VBR-rt), unspecified bit rate (UBR), and unspecified bit rate plus (UBR+).
Operate back-to-back or through a digital subscriber line access multiplexer (DSLAM).
Provide toll-quality Voice over IP delivery over AAL5.
Support VoATM over AAL2, but AAL2 is not supported on the Cisco 1700 series routers.
Support VoATM over AAL5.
Support FS OAM loopback and continuity check (oversubscription).
Interface and Controller Numbering on the Cisco 1721 Router
If a WIC-1SHDSL-V2 or WIC-1SHDSL-V3 is installed in a Cisco 1721 router, the interfaces and controllers are assigned numbers based on a numbering scheme that is different from the slot numbering scheme on other Cisco routers. This is because the Cisco 1721 router assigns only a slot number without also assigning a port number. Other Cisco routers typically use a slot and port number combination.
If a WIC-1SHDSL-V2 or WIC-1SHDSL-V3 (the DSL controller) is installed in slot 0, the ATM interfaces (ADSL/SHDSL) will be numbered relative to the DSL controller in slot 0. See the table below for examples of the slot numbering scheme on the Cisco 1721 router.
With an ATM card in slot 0, the WIC-1SHDSL-V2 or WIC-1SHDSL-V3 in slot 1 will be numbered relative to the number of ports in slot 0.
If both slots are occupied by DSL controllers, the logical interfaces configured on each controller will have the same number as the slot occupied by the DSL controller. All logical interfaces on the WIC-1SHDSL-V2 will have the same number as the DSL controller.
Interface Cards and Controllers Installed |
Slot Numbering Assignment |
---|---|
A WIC-1SHDSL-V2 or WIC-1SHDSL-V3 is in slot 0, and an ADSL/SHDSL WIC is in slot 1. |
For WIC-1SHDSL-V2 or WIC-1SHDSL-V3: controller dsl 0 interface atm 0 For ADSL/SHDSL: interface atm 1 |
An ATM card is in slot 0, and a WIC-1SHDSL-V2 or WIC-1SHDSL-V3 is in slot 1. The WIC-1SHDSL-V2 or WIC-1SHDSL-V3 will be numbered relative to the ports in slot 0. |
For ADSL/SHDSL: interface atm 0 For WIC-1SHDSL-V2 or WIC-1SHDSL-V3: controller dsl 1 interface atm 1 |
Interface Numbering on Cisco 2800 and Cisco 3800 Series Routers
This section describes the interface numbering scheme for Cisco 2800 and Cisco 3800 series routers. If an interface card is installed in a Cisco 2800 series or Cisco 3800 series router, the interfaces must use a triple-number scheme to identify them. This triple-number assignment is different from the standard interface numbering scheme on other Cisco routers.
The table below shows the interface numbering for the onboard Fast Ethernet ports and the interface slots on Cisco 2800 and Cisco 3800 series routers.
Port/Slot |
Interface Numbering |
Example |
---|---|---|
Fast Ethernet ports (onboard) |
0/0, 0/1 |
FE 0/0, 0/1 |
Slot 1 |
Slot 0/0/0 |
FE 0/0/0, 0/0/1, 0/0/2, 0/0/3 |
Slot 2 |
Slot 0/1/0 |
(Serial 2T) Serial 0/1/0, 0/1/1 |
Slot 3 |
Slot 0/2/0 |
FE 0/2/0 |
Slot 4 |
Slot 0/3/0 |
(G.SHDSL) ATM 0/3/0 |
How to Configure ATM Mode for Two-Wire or Four-Wire SHDSL
- Configuring G.SHDSL Service
- Verifying the ATM Configuration
- Verifying DSL Configuration
- Troubleshooting Tasks
Configuring G.SHDSL Service
This section details how to configure the ATM Mode for Two-Wire or Four-Wire SHDSL feature for G.SHDSL service.
To configure G.SHDSL service in ATM mode on a Cisco router containing a G.SHDSL WIC, complete the steps in the Summary Steps or the Detailed Steps, beginning in global configuration mode.
The following list of prerequisites should be followed for this configuration:
A G.SHDSL WIC must be installed in the router to match the DSL service to be configured.
Routers may be set up for back-to-back operation as shown in the figure below, or they may be connected to a DSLAM.
1.
enable
2.
configure
terminal
3.
controller
dsl
slot
/
port
4.
line-term
{co
|
cpe]
5.
dsl-mode
shdsl
symmetric
annex
mode
6.
ignore-error-duration
seconds
7.
mode
atm
8.
For
CPE:
9.
line-rate
{rate|
auto}
10.
exit
11.
interface
atm
slot
/port
12.
ip
address
ip-address
subnet-mask
13.
atm
ilmi-keepalive
[seconds]
14.
pvc
[name]
vpi/vci
15.
protocol
protocol
[protocol-address]
16.
vbr-rt
peak-rate
average-cell-rate
burst
17.
encapsulation
aal2
|
aal5ciscoppp |
aal5mux |
aal5nlpid |
aal5snap| aal5autoppp
18.
exit
19.
exit
20.
exit
21.
show
interface
atm
slot
/
port
22. exit
DETAILED STEPS
Examples
Example of the Configuration Before Configuring ATM Mode:
controller DSL 0/0 line-term cpe
Example for 4-wire ATM, Annex B, and Line Rate 3200
controller DSL 0/1 mode atm line-term cpe line-mode 4-wire enhanced dsl-mode shdsl symmetric annex B line-rate 3200
What to Do Next
The next task is to verify the ATM mode or DSL mode for the router.
Verifying the ATM Configuration
Perform the steps in this section to verify the ATM configuration.
1.
enable
2.
show
running-config
3. show controllers atm slot/port
4. show atm vc
5. debug atm events
6. debug atm errors
7. show interface atm slot/port
8. exit
DETAILED STEPS
Command or Action | Purpose | |
---|---|---|
Step 1 |
enable
Example: Router> enable |
Enables privileged EXEC mode.
|
Step 2 |
show
running-config
Example: Router# show running-config |
Displays current running configuration and the status for all controllers. |
Step 3 |
show controllers atm slot/port Example: Router# show controllers atm 0/1 |
Displays ATM controller statistics. The keywords and arguments are as follows:
|
Step 4 |
show atm vc Example: Router# show atm vc |
Displays PVC status. |
Step 5 |
debug atm events Example: Router# debug atm events |
Identifies ATM-related events as they are generated. |
Step 6 |
debug atm errors Example: Router# debug atm errors |
Identifies interfaces with ATM errors. |
Step 7 |
show interface atm slot/port Example: Router# show interface atm 0/1 |
Displays the status of the ATM interface. Ensure that the ATM slot/port and the line protocol are up. The keywords and arguments are as follows:
|
Step 8 |
exit Example: Example: Router# exit |
Exits privileged EXEC mode. |
Examples
The following example shows how the show interface atmcommand is used and that the ATM slot/port and line protocol are up:
Router# show interfaces atm 0/0 ATM0/0 is up, line protocol is up Hardware is DSLSAR MTU 4470 bytes, sub MTU 4470, BW 4608 Kbit, DLY 110 usec, reliability 0/255, txload 1/255, rxload 1/255 Encapsulation ATM, loopback not set Encapsulation(s): AAL5 , PVC mode 23 maximum active VCs, 256 VCs per VP, 1 current VCCs VC Auto Creation Disabled. VC idle disconnect time: 300 seconds Last input never, output never, output hang never Last clearing of "show interface" counters never Input queue: 0/75/0/0 (size/max/drops/flushes); Total output drops: 0 Queueing strategy: Per VC Queueing 30 second input rate 0 bits/sec, 0 packets/sec 30 second output rate 0 bits/sec, 0 packets/sec 0 packets input, 0 bytes, 0 no buffer Received 0 broadcasts, 0 runts, 0 giants, 0 throttles 0 input errors, 0 CRC, 0 frame, 0 overrun, 0 ignored, 0 abort 0 packets output, 0 bytes, 0 underruns 0 output errors, 0 collisions, 1 interface resets 0 output buffer failures, 0 output buffers swapped out 3725# show atm vc VCD / Peak Avg/Min Burst Interface Name VPI VCI Type Encaps SC Kbps Kbps Cells Sts 0/0.1 1 2 100 PVC MUX VBR 2000 2000 0 UP 0/1.1 1 2 100 PVC SNAP CBR 4608 UP 0/2.1 1 2 100 PVC SNAP VBR 4608 4200 0 UP 1/0.1 1 2 100 PVC SNAP VBR 4608 4608 0 UP 3725# Router# show atm vc VCD / Peak Avg/Min Burst Interface Name VPI VCI Type Encaps SC Kbps Kbps Cells Sts 1/0.3 2 9 36 PVC MUX UBR 800 UP 1/0.2 1 9 37 PVC SNAP UBR 800 UP 3725# show controllers atm 0 / 0 Interface: ATM0/0, Hardware: DSLSAR, State: up IDB: 645F4B98 Instance: 645F646C reg_dslsar:3C200000 wic_regs: 3C200080 PHY Inst:0 Ser0Inst: 645DFC8C Ser1Inst: 645EA608 us_bwidth:4608 Slot: 0 Unit: 0 Subunit: 0 pkt Size: 4528 VCperVP: 256 max_vp: 256 max_vc: 65536 total vc: 1 rct_size:65536 vpivcibit:16 connTblVCI:8 vpi_bits: 8 vpvc_sel:3 enabled: 0 throttled: 0 cell drops: 0 Last Peridic Timer 00:44:26.872(2666872) Parallel reads to TCQ:0 tx count reset = 0, periodic safe start = 0 Attempts to overwrite SCC txring: 0 Host Controller lockup recovery Info: recovery count1= 0, recovery count2= 0 Saved Host Controller Info to check any lockup: scc = 0, output_qcount = 0, head:0, buf addr = 0x00000000, serial outputs = 0 scc = 1, output_qcount = 0, head:54, buf addr = 0x00000000, serial outputs = 212 Serial idb(AAL5) output_qcount:0 max:40 Serial idb(RAW) output_qcount:0, max:40 Sar ctrl queue: max depth = 0, current queue depth = 0, drops = 0, urun cnt = 0, total cnt = 106 Serial idb tx count: AAL5: 0, RAW: 212, Drop count:AAL5: 0, RAW: 0 Host Controller Clock rate Info: SCC Clockrates: SCC0 = 1000000 (ATM0/0) SCC1 = 8000000 (ATM0/0) SCC2 = 1000000 (ATM0/1) SCC3 = 1000000 (ATM0/2) SCC4 = 5300000 (ATM0/1) SCC5 = 8000000 (ATM0/2) SCC6 = 0 SCC7 = 0 WIC Register Value Notes --------------- ---------- ---------- FPGA Dev ID (LB) 0x53 'S' FPGA Dev ID (UB) 0x4E 'N' FPGA Revision 0xA7 WIC Config Reg 0x35 WIC / VIC select = WIC; CTRLE addr bit 8 = 0; NTR Enable = 0; OK LED on; LOOPBACK LED off; CD LED on; WIC Config Reg2 0x07 Gen bus error on bad G.SHDSL ATM/T1/E1 access Int 0 Enable Reg 0x01 G.SHDSL ATM/T1/E1 normal interrupt enabled G.SHDSL ATM/T1/E1 error interrupt disabled DSLSAR Register Value Notes --------------- ---------- ---------- sdram_refresh: 0x410FFFF Expected value: 0x428xxxx intr_event_reg: 0xC0 TMR. intr_enable_reg: 0x13C FIFOF.FBQE.RQAF.RPQAF.TSQAF. config: 0x660D0A20 UTOPIA.RXEN.RegulateXmit.RMCell.TXEN. Rx Buffer size: 8192. RCT: Large, VPI Bits: 8. status: 0x0 clkPerCell: 814121 (line rate: 4608 Kbps) Pre-timer Count: 461 rcid_tableBase: 0x0 rct_base: 0x10000 tstBase1: 0x13C28 TST boot jump. rawCellBase: 0x14300 (0/128) slots used. rpq_base: 0x16000 tsqb(Tx Stat Q): 0x17000 fbq_base: 0x17880 (fbq_count: 128) txChanQueue: 0x18000 rxBuffers: 0x30000 txBuffers: 0x130000 Lookup Error cnt: 0x0 Invalid Cell cnt: 0x0 SCCA Rx Errors: 0x0 SCCB Rx Errors: 0x0 Drop Pkt Count: 0x0 Total Tx Count: 0x0 Total Rx Count: 0x0 Timer: 0x73A141 DSLSAR Interrupts:0x0 Last Addr:0x12E14 Router# show controllers atm 1 / 0 Interface ATM1/0 is up Hardware is DSLSAR (with Globespan G.SHDSL Module) IDB: 62586758 Instance:6258E054 reg_dslsar:3C810000 wic_regs:3C810080 PHY Inst:62588490 Ser0Inst:62573074 Ser1Inst: 6257CBD8 us_bwidth:800 Slot: 1 Unit: 1 Subunit: 0 pkt Size:4496 VCperVP:256 max_vp: 256 max_vc: 65536 total vc:2 rct_size:65536 vpivcibit:16 connTblVCI:8 vpi_bits:8 vpvc_sel:3 enabled: 0 throttled:0 WIC Register Value Notes --------------- ---------- ---------- WIC Config Reg 0x45 WIC / VIC select = WIC; CTRLE addr bit 8 = 1; OK LED on; LOOPBACK LED off; CD LED on; WIC Config Reg2 0x07 Gen bus error on bad ADSL access Int 0 Enable Reg 0x03 ADSL normal interrupt enabled ADSL error interrupt enabled
What to Do Next
Verify the configuration using the detailed steps in the Verifying DSL Configuration.
Verifying DSL Configuration
Perform the steps in this section to verify the DSL configuration.
1.
enable
2.
show
running-config
3.
show
controller
dsl
slot/port
4. debug xdsl application
5. debug xdsl eoc
6. debug xdsl error
7. exit
DETAILED STEPS
Command or Action | Purpose | |
---|---|---|
Step 1 |
enable
Example: Router> enable |
Enables privileged EXEC mode.
|
Step 2 |
show
running-config
Example: Router# show running-config |
Displays the current running configuration and the status for all controllers. |
Step 3 |
show
controller
dsl
slot/port
Example: Router# show controller dsl 0/2 |
Displays the DSL controller status. The keywords and arguments are as follows:
|
Step 4 |
debug xdsl application Example: Router# debug dsl application |
Displays output of the DSL if the DSL does not come up. |
Step 5 |
debug xdsl eoc Example: Router# debug xdsl eoc |
Displays what is in the embedded operation channel (EOC) messages. |
Step 6 |
debug xdsl error Example: Router# debug xdsl error |
Displays error messages. |
Step 7 |
exit Example: Example: Router# exit |
Exits privileged EXEC mode. |
Examples
The following example shows how to verify 4-wire ATM mode in line zero (CPE):
Router# show controller dsl 0/0 DSL 0/0 controller UP Globespan xDSL controller chipset Line Mode: Four Wire DSL mode: Trained with SHDSL Annex B Frame mode: Utopia Configured Line rate: 4608Kbps Line Re-activated 9 times after system bootup LOSW Defect alarm: ACTIVE CRC per second alarm: ACTIVE Line termination: CPE FPGA Revision: 0xB3 Line 0 statistics Current 15 min counters CRC : 0 LOSW Defect : 0 ES : 0 SES : 0 UAS : 25 Previous 15 min counters CRC : 0 LOSW Defect : 0 ES : 0 SES : 0 UAS : 0 Current 24 hr counters CRC : 0 LOSW Defect : 4 ES : 0 SES : 0 UAS : 25 Previous 24 hr counters CRC : 5 LOSW Defect : 4 ES : 1 SES : 0 UAS : 19 Line 1 statistics Current 15 min counters CRC : 0 LOSW Defect : 0 ES : 0 SES : 0 UAS : 25 Previous 15 min counters CRC : 0 LOSW Defect : 0 ES : 0 SES : 0 UAS : 0 Current 24 hr counters CRC : 0 LOSW Defect : 0 ES : 0 SES : 0 UAS : 25 Previous 24 hr counters CRC : 6 LOSW Defect : 4 ES : 1 SES : 0 UAS : 19 Line-0 status Chipset Version: 0 Firmware Version: R3.0.1 Modem Status: Data, Status 1 Last Fail Mode: No Failure status:0x0 Line rate: 2312 Kbps Framer Sync Status: In Sync Rcv Clock Status: In the Range Loop Attenuation: 0.0 dB Transmit Power: 9.5 dB Receiver Gain: 19.5420 dB SNR Sampling: 37.6080 dB Line-1 status Chipset Version: 0 Firmware Version: R3.0.1 Modem Status: Data, Status 1 Last Fail Mode: No Failure status:0x0 Line rate: 2312 Kbps Framer Sync Status: In Sync Rcv Clock Status: In the Range Loop Attenuation: 0.0 dB Transmit Power: 9.5 dB Receiver Gain: 19.5420 dB SNR Sampling: 37.6080 dB Dying Gasp: Present
Sample Output--Building Configuration
Router> show running-config Current configuration : 3183 bytes ! version 12.3 service timestamps debug uptime service timestamps log uptime no service password-encryption ! hostname 3725 ! boot-start-marker boot system flash c3725-is-mz.0424 boot system tftp shriv/c3725-is-mz.new 223.255.254.254 boot-end-marker ! ! memory-size iomem 25 no network-clock-participate slot 1 no network-clock-participate slot 2 no network-clock-participate wic 0 no network-clock-participate wic 1 no network-clock-participate wic 2 no network-clock-participate aim 0 no network-clock-participate aim 1 no aaa new-model ip subnet-zero ip cef ! ! ! ! ! ! ! controller DSL 0/0 mode atm line-term co line-mode 4-wire dsl-mode shdsl symmetric annex B line-rate 4608 ! controller DSL 0/1 mode atm line-term co line-mode 4-wire dsl-mode shdsl symmetric annex B line-rate 4608 controller DSL 0/2 mode atm line-term co line-mode 4-wire dsl-mode shdsl symmetric annex B line-rate 4608 ! controller DSL 1/0 mode atm line-term co line-mode 4-wire dsl-mode shdsl symmetric annex B line-rate 4608 ! ! ! interface ATM0/0 no ip address load-interval 30 no atm ilmi-keepalive clock rate aal5 8000000 ! interface ATM0/0.1 point-to-point ip address 5.0.0.1 255.0.0.0 pvc 2/100 vbr-rt 2000 2000 oam-pvc 0 encapsulation aal5mux ip ! ! interface FastEthernet0/0 ip address 1.3.208.25 255.255.0.0 duplex auto speed auto no cdp enable ! interface ATM0/1 no ip address load-interval 30 no atm ilmi-keepalive clock rate aal5 5300000 ! interface ATM0/1.1 point-to-point ip address 6.0.0.1 255.0.0.0 pvc 2/100 cbr 4608 ! ! interface FastEthernet0/1 mac-address 0000.0000.0011 ip address 70.0.0.2 255.0.0.0 secondary ip address 90.0.0.2 255.0.0.0 secondary ip address 50.0.0.2 255.0.0.0 load-interval 30 speed 100 full-duplex no cdp enable ! interface ATM0/2 no ip address no atm ilmi-keepalive clock rate aal5 8000000 ! interface ATM0/2.1 point-to-point ip address 7.0.0.1 255.0.0.0 pvc 2/100 vbr-nrt 4608 4200 ! ! interface ATM1/0 no ip address load-interval 30 no atm ilmi-keepalive clock rate aal5 5300000 ! interface ATM1/0.1 point-to-point ip address 8.0.0.1 255.0.0.0 pvc 2/100 vbr-nrt 4608 4608 ! ! interface FastEthernet1/0 no ip address shutdown duplex auto speed auto no cdp enable ! interface FastEthernet1/1 no ip address shutdown duplex auto speed auto no cdp enable ! ip default-gateway 172.19.163.44 ip classless ip route 60.0.0.0 255.0.0.0 ATM1/0.1 ip route 80.0.0.0 255.0.0.0 ATM0/1.1 ip route 223.255.254.254 255.255.255.255 FastEthernet0/0 ip route 223.255.254.254 255.255.255.255 1.3.0.1 ip http server ! ! access-list 101 permit ip host 20.0.0.2 host 20.0.0.1 snmp-server community public RO snmp-server enable traps tty no cdp run ! ! ! control-plane ! ! ! ! ! ! ! alias exec c conf t ! line con 0 exec-timeout 0 0 privilege level 15 line aux 0 line vty 0 4 exec-timeout 0 0 privilege level 15 no login ! end
Troubleshooting Tasks
The following commands verify hardware on the router:
show version --Lists the modules installed in the router. If DSL controllers are installed, the output displays the following line: - 1 DSL controller --Indicates one DSL controller is installed in the router
and one of the following lines:
- 1 ATM network interface(s) --If the DSL controller is configured for mode ATM
- 1 Channelized T1/PRI port(s) --If the DSL controller is configured for mode T1
show controllers atm --Displays the ATM controller status and statistics. The sample below shows the output in ATM mode. Actual output may vary depending on the router and the configuration.
Router# show controllers atm 0 / 0 Interface: ATM0/0, Hardware: DSLSAR, State: up IDB: 645F4B98 Instance: 645F646C reg_dslsar:3C200000 wic_regs: 3C200080 PHY Inst:0 Ser0Inst: 645DFC8C Ser1Inst: 645EA608 us_bwidth:4608 Slot: 0 Unit: 0 Subunit: 0 pkt Size: 4528 VCperVP: 256 max_vp: 256 max_vc: 65536 total vc: 1 rct_size:65536 vpivcibit:16 connTblVCI:8 vpi_bits: 8 vpvc_sel:3 enabled: 0 throttled: 0 cell drops: 0 Last Peridic Timer 00:44:26.872(2666872) Parallel reads to TCQ:0 tx count reset = 0, periodic safe start = 0 Attempts to overwrite SCC txring: 0 Host Controller lockup recovery Info: recovery count1= 0, recovery count2= 0 Saved Host Controller Info to check any lockup: scc = 0, output_qcount = 0, head:0, buf addr = 0x00000000, serial outputs = 0 scc = 1, output_qcount = 0, head:54, buf addr = 0x00000000, serial outputs = 212 Serial idb(AAL5) output_qcount:0 max:40 Serial idb(RAW) output_qcount:0, max:40 Sar ctrl queue: max depth = 0, current queue depth = 0, drops = 0, urun cnt = 0, total cnt = 106 Serial idb tx count: AAL5: 0, RAW: 212, Drop count:AAL5: 0, RAW: 0 Host Controller Clock rate Info: SCC Clockrates: SCC0 = 1000000 (ATM0/0) SCC1 = 8000000 (ATM0/0) SCC2 = 1000000 (ATM0/1) SCC3 = 1000000 (ATM0/2) SCC4 = 5300000 (ATM0/1) SCC5 = 8000000 (ATM0/2) SCC6 = 0 SCC7 = 0 WIC Register Value Notes --------------- ---------- ---------- FPGA Dev ID (LB) 0x53 'S' FPGA Dev ID (UB) 0x4E 'N' FPGA Revision 0xA7 WIC Config Reg 0x35 WIC / VIC select = WIC; CTRLE addr bit 8 = 0; NTR Enable = 0; OK LED on; LOOPBACK LED off; CD LED on; WIC Config Reg2 0x07 Gen bus error on bad G.SHDSL ATM/T1/E1 access Int 0 Enable Reg 0x01 G.SHDSL ATM/T1/E1 normal interrupt enabled G.SHDSL ATM/T1/E1 error interrupt disabled DSLSAR Register Value Notes --------------- ---------- ---------- sdram_refresh: 0x410FFFF Expected value: 0x428xxxx intr_event_reg: 0xC0 TMR. intr_enable_reg: 0x13C FIFOF.FBQE.RQAF.RPQAF.TSQAF. config: 0x660D0A20 UTOPIA.RXEN.RegulateXmit.RMCell.TXEN. Rx Buffer size: 8192. RCT: Large, VPI Bits: 8. status: 0x0 clkPerCell: 814121 (line rate: 4608 Kbps) Pre-timer Count: 461 rcid_tableBase: 0x0 rct_base: 0x10000 tstBase1: 0x13C28 TST boot jump. rawCellBase: 0x14300 (0/128) slots used. rpq_base: 0x16000 tsqb(Tx Stat Q): 0x17000 fbq_base: 0x17880 (fbq_count: 128) txChanQueue: 0x18000 rxBuffers: 0x30000 txBuffers: 0x130000 Lookup Error cnt: 0x0 Invalid Cell cnt: 0x0 SCCA Rx Errors: 0x0 SCCB Rx Errors: 0x0 Drop Pkt Count: 0x0 Total Tx Count: 0x0 Total Rx Count: 0x0 Timer: 0x73A141 DSLSAR Interrupts:0x0 Last Addr:0x12E14
show controllers dsl-- Displays the DSL controller status and statistics. The sample below shows the output in T1 mode. Actual output may vary depending on the router and the configuration.
Router# show controllers dsl 0 / 0 DSL 0/0 controller UP Globespan xDSL controller chipset DSL mode: SHDSL Annex B Frame mode: Utopia Configured Line rate: 4608Kbps Line Re-activated 5 times after system bootup LOSW Defect alarm: ACTIVE CRC per second alarm: ACTIVE Line termination: CO FPGA Revision: 0xA7 Line 0 statistics Current 15 min CRC: 679 Current 15 min LOSW Defect: 8 Current 15 min ES: 5 Current 15 min SES: 5 Current 15 min UAS: 441 Previous 15 min CRC: 0 Previous 15 min LOSW Defect: 0 Previous 15 min ES: 0 Previous 15 min SES: 0 Previous 15 min UAS: 0 Line 1 statistics Current 15 min CRC: 577 Current 15 min LOSW Defect: 8 Current 15 min ES: 7 Current 15 min SES: 4 Current 15 min UAS: 455 Previous 15 min CRC: 0 Previous 15 min LOSW Defect: 0 Previous 15 min ES: 0 Previous 15 min SES: 0 Previous 15 min UAS: 0 Line-0 status Chipset Version: 1 Firmware Version: A29733 Modem Status: Data, Status 1 Last Fail Mode: No Failure status:0x0 Line rate: 2312 Kbps Framer Sync Status: In Sync Rcv Clock Status: In the Range Loop Attenuation: 0.600 dB Transmit Power: 8.5 dB Receiver Gain: 21.420 dB SNR Sampling: 39.3690 dB Line-1 status Chipset Version: 1 Firmware Version: A29733 Modem Status: Data, Status 1 Last Fail Mode: No Failure status:0x0 Line rate: 2312 Kbps Framer Sync Status: In Sync Rcv Clock Status: In the Range Loop Attenuation: 0.4294966256 dB Transmit Power: 8.5 dB Receiver Gain: 21.420 dB SNR Sampling: 39.1570 dB Dying Gasp: Present
debug xdsl application --Displays output from the xDSL to see what is happening if the DSL does not come up. When the debug xdsl application command is used, resources and the buffer are used and will impact operation.
Router# debug xdsl application xDSL application debugging is on Router# Apr 23 06:01:26.476: DSL 0/0 process_get_wakeup Apr 23 06:01:27.476: DSL 0/0 process_get_wakeup Apr 23 06:01:27.720: DSL 0/0 process_get_wakeup Apr 23 06:01:27.720: DSL 0/0 xdsl_process_boolean_events XDSL_LINE_UP_EVENT: Apr 23 06:01:28.476: DSL 0/0 process_get_wakeup Apr 23 06:01:29.476: DSL 0/0 process_get_wakeup Apr 23 06:01:30.476: DSL 0/0 process_get_wakeup Apr 23 06:01:31.476: DSL 0/0 process_get_wakeup Apr 23 06:01:32.476: DSL 0/0 process_get_wakeup Apr 23 06:01:33.476: DSL 0/0 process_get_wakeup Apr 23 06:01:34.476: DSL 0/0 process_get_wakeup Apr 23 06:01:34.476: DSL 0/0 SNR Sampling: 42.8370 dB Apr 23 06:01:35.476: DSL 0/0 process_get_wakeup Apr 23 06:01:35.476: DSL 0/0 SNR Sampling: 41.9650 dB Apr 23 06:01:36.476: DSL 0/0 process_get_wakeup Apr 23 06:01:36.476: DSL 0/0 SNR Sampling: 41.2400 dB Apr 23 06:01:37.476: DSL 0/0 process_get_wakeup Apr 23 06:01:37.476: DSL 0/0 SNR Sampling: 40.6180 dB Apr 23 06:01:37.476: DSL 0/0 xdsl_background_process: one_second_timer triggers download Apr 23 06:01:37.476: DSL 0/0 process_get_wakeup Apr 23 06:01:37.476: DSL 0/0 xdsl_background_process:Download boolean event received Apr 23 06:01:37.476: DSL 0/0 xdsl_controller_reset: cdb-state=down Apr 23 06:01:37.476: %CONTROLLER-5-UPDOWN: Controller DSL 0/0, changed state to down Apr 23 06:01:38.476: DSL 0/0 process_get_wakeup Apr 23 06:01:39.476: DSL 0/0 process_get_wakeup Apr 23 06:01:40.476: DSL 0/0 process_get_wakeup Apr 23 06:01:41.476: DSL 0/0 process_get_wakeup Apr 23 06:01:42.476: DSL 0/0 process_get_wakeup Apr 23 06:01:43.476: DSL 0/0 process_get_wakeup Apr 23 06:01:44.476: DSL 0/0 process_get_wakeup Apr 23 06:01:45.476: DSL 0/0 process_get_wakeup Apr 23 06:01:46.476: DSL 0/0 process_get_wakeup Apr 23 06:01:47.476: DSL 0/0 process_get_wakeup Apr 23 06:01:48.476: DSL 0/0 process_get_wakeup Apr 23 06:01:49.476: DSL 0/0 process_get_wakeup Apr 23 06:01:50.476: DSL 0/0 process_get_wakeup Apr 23 06:01:51.476: DSL 0/0 process_get_wakeup Apr 23 06:01:52.476: DSL 0/0 process_get_wakeup Apr 23 06:01:53.476: DSL 0/0 process_get_wakeup Apr 23 06:01:54.476: DSL 0/0 process_get_wakeup Apr 23 06:01:55.476: DSL 0/0 process_get_wakeup Apr 23 06:01:56.476: DSL 0/0 process_get_wakeup Apr 23 06:01:57.476: DSL 0/0 process_get_wakeup Apr 23 06:01:57.796: DSL 0/0 process_get_wakeup Apr 23 06:01:57.796: DSL 0/0 xdsl_process_boolean_events XDSL_LINE_UP_EVENT: Apr 23 06:01:57.812: DSL 0/0 process_get_wakeup Apr 23 06:01:57.812: DSL 0/0 xdsl_background_process: XDSL link up boolean event received Apr 23 06:01:57.812: DSL 0/0 controller Link up! line rate: 4608 Kbps Apr 23 06:01:57.812: DSL 0/0 xdsl_controller_reset: cdb-state=up Apr 23 06:01:57.812: %CONTROLLER-5-UPDOWN: Controller DSL 0/0, changed state to up Apr 23 06:01:57.812: DSL 0/0 Apr 23 06:01:57.812: Dslsar data rate 4608 Apr 23 06:01:57.816: DSL 0/0 TipRing 1, Xmit_Power Val 85, xmit_power 8.5 Apr 23 06:01:57.816: DSL 0/0 Mode 2, BW 4608, power_base_value 145, power_backoff 6 Apr 23 06:01:57.912: DSL 0/0 process_get_wakeup Apr 23 06:01:57.916: DSL 0/0 process_get_wakeup Apr 23 06:01:57.916: DSL 0/0 xdsl_background_process: EOC boolean event received Apr 23 06:01:58.008: DSL 0/0 process_get_wakeup Apr 23 06:01:58.008: DSL 0/0 process_get_wakeup Apr 23 06:01:58.012: DSL 0/0 process_get_wakeup Apr 23 06:01:58.012: DSL 0/0 xdsl_background_process: EOC boolean event received Apr 23 06:01:58.104: DSL 0/0 process_get_wakeup Apr 23 06:01:58.104: DSL 0/0 process_get_wakeup Apr 23 06:01:58.108: DSL 0/0 process_get_wakeup Apr 23 06:01:58.108: DSL 0/0 xdsl_background_process: EOC boolean event received Apr 23 06:01:58.200: DSL 0/0 process_get_wakeup Apr 23 06:01:58.204: DSL 0/0 process_get_wakeup Apr 23 06:01:58.204: DSL 0/0 process_get_wakeup Apr 23 06:01:58.204: DSL 0/0 xdsl_background_process: EOC boolean event received Apr 23 06:01:58.208: DSL 0/0 process_get_wakeup Apr 23 06:01:58.296: DSL 0/0 process_get_wakeup Apr 23 06:01:58.392: DSL 0/0 process_get_wakeup Apr 23 06:01:58.476: DSL 0/0 process_get_wakeup Apr 23 06:01:59.476: DSL 0/0 process_get_wakeup Apr 23 06:02:00.476: DSL 0/0 process_get_wakeup Apr 23 06:02:01.476: DSL 0/0 process_get_wakeup Apr 23 06:02:02.476: DSL 0/0 process_get_wakeup Router# Router# Apr 23 06:02:02.920: DSL 0/0 process_get_wakeup Apr 23 06:02:02.920: DSL 0/0 process_get_wakeup Apr 23 06:02:02.920: DSL 0/0 xdsl_background_process: EOC boolean event received Apr 23 06:02:03.016: DSL 0/0 process_get_wakeup Apr 23 06:02:03.016: DSL 0/0 process_get_wakeup Apr 23 06:02:03.016: DSL 0/0 process_get_wakeup Apr 23 06:02:03.016: DSL 0/0 xdsl_background_process: EOC boolean event received Apr 23 06:02:03.020: DSL 0/0 process_get_wakeup Apr 23 06:02:03.112: DSL 0/0 process_get_wakeup Apr 23 06:02:03.208: DSL 0/0 process_get_wakeup Apr 23 06:02:03.304: DSL 0/0 process_get_wakeup Apr 23 06:02:03.476: DSL 0/0 process_get_wakeup Router# Router# Apr 23 06:02:04.476: DSL 0/0 process_get_wakeup Apr 23 06:02:04.476: DSL 0/0 SNR Sampling: 42.3790 dB Apr 23 06:02:04.476: DSL 0/0 SNR Sampling: 42.8370 dB Router# Apr 23 06:02:04.476: %LINK-3-UPDOWN: Interface ATM0/0, changed state to up Apr 23 06:02:05.476: DSL 0/0 process_get_wakeup Apr 23 06:02:05.476: DSL 0/0 SNR Sampling: 41.5880 dB Apr 23 06:02:05.476: DSL 0/0 SNR Sampling: 42.3790 dB Apr 23 06:02:05.476: %LINEPROTO-5-UPDOWN: Line protocol on Interface ATM0/0, changed state to up Router# Router# Apr 23 06:02:06.476: DSL 0/0 process_get_wakeup Apr 23 06:02:06.476: DSL 0/0 SNR Sampling: 40.9180 dB Apr 23 06:02:06.476: DSL 0/0 SNR Sampling: 41.5880 dB Apr 23 06:02:07.476: DSL 0/0 process_get_wakeup Apr 23 06:02:07.476: DSL 0/0 SNR Sampling: 40.6180 dB Apr 23 06:02:07.476: DSL 0/0 SNR Sampling: 41.2400 dBu all Apr 23 06:02:07.912: DSL 0/0 process_get_wakeup Apr 23 06:02:07.912: DSL 0/0 process_get_wakeup Apr 23 06:02:07.912: DSL 0/0 xdsl_background_process: EOC boolean event received Apr 23 06:02:08.008: DSL 0/0 process_get_wakeup Apr 23 06:02:08.008: DSL 0/0 process_get_wakeup Apr 23 06:02:08.008: DSL 0/0 process_get_wakeup Apr 23 06:02:08.008: DSL 0/0 xdsl_background_process: EOC boolean event received Apr 23 06:02:08.016: DSL 0/0 process_get_wakeup Apr 23 06:02:08.104: DSL 0/0 process_get_wakeup Apr 23 06:02:08.200: DSL 0/0 process_get_wakeup Apr 23 06:02:08.296: DSL 0/0 process_get_wakeup Apr 23 06:02:08.476: DSL 0/0 process_get_wakeup Apr 23 06:02:08.476: DSL 0/0 All possible debugging has been turned off Router# Router# Router# Router# SNR Sampling: 40.750 dB Apr 23 06:02:08.476: DSL 0/0 SNR Sampling: 40.6180 dB Apr 23 06:02:09.476: DSL 0/0 process_get_wakeup Apr 23 06:02:09.476: DSL 0/0 SNR Sampling: 39.5920 dB Apr 23 06:02:09.476: DSL 0/0 SNR Sampling: 40.3380 dB
debug xdsl driver --Displays what is happening when the drivers are being downloaded and installed. The following example displays a sample output from the debug xdsl drivercommand: - 4-wire mode:
Router# debug xdsl driver xDSL driver debugging is on Router# 01:04:18: DSL 2/0 framer intr_status 0xC4 01:04:18: DSL 2/0 xdsl_gsi_int_disable(true):: 0x0 01:04:18: DSL 0/1 framer intr_status 0xC4 01:04:18: DSL 2/0 xdsl_gsi_int_disable(false):: 0x1 01:04:18: DSL 0/1 xdsl_gsi_int_disable(true):: 0x0 01:04:18: DSL 0/1 xdsl_gsi_int_disable(false):: 0x1 01:04:18: DSL 0/2 framer intr_status 0xC4 01:04:18: DSL 0/2 xdsl_gsi_int_disable(true):: 0x0 01:04:18: DSL 0/2 xdsl_gsi_int_disable(false):: 0x1 01:04:18: DSL 2/0 framer intr_status 0xC4 01:04:18: DSL 2/0 xdsl_gsi_int_disable(true):: 0x0 01:04:18: DSL 0/1 framer intr_status 0xC4 01:04:18: DSL 2/0 xdsl_gsi_int_disable(false):: 0x1 01:04:18: DSL 0/1 framer intr_status 0xC1 01:04:18: DSL 0/1 xdsl_gsi_int_disable(true):: 0x0 01:04:18: DSL 0/1 xdsl_gsi_int_disable(false):: 0x1 01:04:18: DSL 2/0 framer intr_status 0xC4 01:04:18: DSL 2/0 framer intr_status 0xC1 01:04:18: DSL 2/0 xdsl_gsi_int_disable(true):: 0x0 01:04:18: DSL 0/1 framer intr_status 0xC4 01:04:18: DSL 2/0 xdsl_gsi_int_disable(false):: 0x1 01:04:18: DSL 0/1 xdsl_gsi_int_disable(true):: 0x0 01:04:18: DSL 0/1 xdsl_gsi_int_disable(false):: 0x1 01:04:18: DSL 0/2 framer intr_status 0xC4 01:04:18: DSL 0/2 xdsl_gsi_int_disable(true):: 0x0 01:04:18: DSL 0/2 01:04:18: DSL 0/2 framer intr_status 0xC1 xdsl_gsi_int_disable(false):: 0x1 01:04:18: DSL 0/2 xdsl_gsi_int_disable(true):: 0x0 01:04:18: DSL 0/2 xdsl_gsi_int_disable(false):: 0x1 01:04:18: DSL 0/2 framer intr_status 0xC4 01:04:18: DSL 0/2 xdsl_gsi_int_disable(true):: 0x0 01:04:18: DSL 0/2 xdsl_gsi_int_disable(false):: 0x1 01:04:19: DSL 0/1 framer intr_status 0xC1 01:04:19: DSL 0/1 xdsl_gsi_int_disable(true):: 0x0 01:04:19: DSL 0/1 xdsl_gsi_int_disable(false):: 0x1 01:04:19: DSL 2/0 framer intr_status 0xC1 01:04:19: DSL 2/0 xdsl_gsi_int_disable(true):: 0x0 01:04:19: DSL 2/0 xdsl_gsi_int_disable(false):: 0x1 01:04:19: DSL 0/2 framer intr_status 0xC1 01:04:19: DSL 0/2 xdsl_gsi_int_disable(true):: 0x0 01:04:19: DSL 0/2 xdsl_gsi_int_disable(false):: 0x1 01:04:19: DSL 0/1 framer intr_status 0xC1 01:04:19: DSL 0/1 xdsl_gsi_int_disable(true):: 0x0 01:04:19: DSL 0/1 xdsl_gsi_int_disable(false):: 0x1 01:04:19: DSL 2/0 framer intr_status 0xC1 01:04:19: DSL 2/0 xdsl_gsi_int_disable(true):: 0x0 01:04:19: DSL 2/0 xdsl_gsi_int_disable(false):: 0x1 01:04:19: DSL 0/2 framer intr_status 0xC1 01:04:19: DSL 0/2 xdsl_gsi_int_disable(true):: 0x0 01:04:19: DSL 0/2 xdsl_gsi_int_disable(false):: 0x1 01:04:19: DSL 0/1 framer intr_status 0xC1 01:04:19: DSL 0/1 xdsl_gsi_int_disable(true):: 0x0 01:04:19: DSL 0/1 xdsl_gsi_int_disable(false):: 0x1 01:04:19: DSL 2/0 framer intr_status 0xC1 01:04:19: DSL 2/0 xdsl_gsi_int_disable(true):: 0x0 01:04:19: DSL 2/0 xdsl_gsi_int_disable(false):: 0x1 01:04:19: DSL 0/2 framer intr_status 0xC1 01:04:19: DSL 0/2 xdsl_gsi_int_disable(true):: 0x0 01:04:19: DSL 0/2 xdsl_gsi_int_disable(false):: 0x1 01:04:22: DSL 0/0 dsp interrupt-download next block for line-0 01:04:22: DSL 0/0 framer intr_status 0xC0 01:04:22: DSL 0/0 dsp interrupt-download next block for line-1 01:04:22: DSL 0/0 framer intr_status 0xC0 01:04:22: DSL 0/0 dsp interrupt-download next block for line-0 01:04:22: DSL 0/0 framer intr_status 0xC0 01:04:22: DSL 0/0 dsp interrupt-download next block for line-1 01:04:22: DSL 0/0 framer intr_status 0xC0 01:04:23: DSL 0/0 dsp interrupt-download next block for line-0 01:04:23: DSL 0/0 DSP interrupt disabled 01:04:23: DSL 0/0 Download completed for line-0 01:04:23: DSL 0/0 framer intr_status 0xC0 01:04:23: DSL 0/0 dsp interrupt-download next block for line-1 01:04:23: DSL 0/0 DSP interrupt disabled 01:04:23: DSL 0/0 Download completed for line-1 01:04:23: DSL 0/0 Framer interrupt enabled 01:04:23: DSL 0/0 framer intr_status 0xC0 01:04:23: DSL 0/0 controller Link up! line rate: 4608 Kbps 01:04:23: %CONTROLLER-5-UPDOWN: Controller DSL 0/0, changed state to up 01:04:23: DSL 0/0 framer intr_status 0xC4 01:04:23: DSL 0/0 xdsl_gsi_int_disable(true):: 0x0 01:04:23: DSL 0/0 xdsl_gsi_int_disable(false):: 0x1 01:04:23: DSL 0/0 framer intr_status 0xC1 01:04:23: DSL 0/0 framer intr_status 0xC4
Router# debug xdsl driver xDSL driver debugging is on 00:58:22: DSL 0/0 dsp interrupt-download next block for line-0 00:58:23: DSL 0/0 framer intr_status 0xC0 00:58:24: DSL 0/0 dsp interrupt-download next block for line-0 00:58:24: DSL 0/0 framer intr_status 0xC0 00:58:37: DSL 0/0 dsp interrupt-download next block for line-0 00:58:37: DSL 0/0 framer intr_status 0xC0 00:58:38: DSL 0/0 dsp interrupt-download next block for line-0 00:58:38: DSL 0/0 framer intr_status 0xC0 00:58:38: DSL 0/0 dsp interrupt-download next block for line-0 00:58:38: DSL 0/0 DSP interrupt disabled 00:58:38: DSL 0/0 Download completed for line-0 00:58:38: DSL 0/0 Framer interrupt enabled 00:58:38: DSL 0/0 framer intr_status 0xC0 00:58:38: DSL 0/0 controller Link up! line rate: 1600 Kbps 00:58:38: %CONTROLLER-5-UPDOWN: Controller DSL 0/0, changed state to up 00:58:38: Dslsar data rate 1600 00:58:38: DSL 0/0 framer intr_status 0xC4 00:58:38: DSL 0/0 xdsl_gsi_int_disable(true):: 0x0 00:58:38: DSL 0/0 xdsl_gsi_int_disable(false):: 0x1 00:58:38: DSL 0/0 framer intr_status 0xC4 00:58:38: DSL 0/0 xdsl_gsi_int_disable(true):: 0x0 00:58:38: DSL 0/0 xdsl_gsi_int_disable(false):: 0x1 00:58:38: DSL 0/0 framer intr_status 0xC1 00:58:38: DSL 0/0 xdsl_gsi_int_disable(true):: 0x0 00:58:38: DSL 0/0 xdsl_gsi_int_disable(false):: 0x1 00:58:38: DSL 0/0 framer intr_status 0xC4 00:58:38: DSL 0/0 xdsl_gsi_int_disable(true):: 0x0 00:58:38: DSL 0/0 xdsl_gsi_int_disable(false):: 0x1 00:58:38: DSL 0/0 framer intr_status 0xC1 00:58:38: DSL 0/0 xdsl_gsi_int_disable(true):: 0x0
Router# debug xdsl driver xDSL driver debugging is on 00:55:15: DSL 0/0 dsp interrupt-download next block for line-1 00:55:15: DSL 0/0 framer intr_status 0xC0 00:55:16: DSL 0/0 dsp interrupt-download next block for line-1 00:55:16: DSL 0/0 framer intr_status 0xC0 00:55:17: DSL 0/0 dsp interrupt-download next block for line-1 00:55:17: DSL 0/0 framer intr_status 0xC0 00:55:19: DSL 0/0 dsp interrupt-download next block for line-1 00:55:19: DSL 0/0 framer intr_status 0xC0 00:55:32: DSL 0/0 dsp interrupt-download next block for line-1 00:55:32: DSL 0/0 framer intr_status 0xC0 00:55:32: DSL 0/0 dsp interrupt-download next block for line-1 00:55:32: DSL 0/0 framer intr_status 0xC0 00:55:32: DSL 0/0 dsp interrupt-download next block for line-1 00:55:32: DSL 0/0 DSP interrupt disabled 00:55:32: DSL 0/0 Download completed for line-1 00:55:32: DSL 0/0 Framer interrupt enabled 00:55:32: DSL 0/0 framer intr_status 0xC0 00:55:32: DSL 0/0 controller Link up! line rate: 1600 Kbps 00:55:32: %CONTROLLER-5-UPDOWN: Controller DSL 0/0, changed state to up 00:55:32: Dslsar data rate 1600 00:55:46: %LINK-3-UPDOWN: Interface ATM0/0, changed state to up 00:55:47: %LINEPROTO-5-UPDOWN: Line protocol on Interface ATM0/0, changed state to up 00:56:28: DSL 0/0 framer intr_status 0xC8 00:56:28: DSL 0/0 xdsl_gsi_int_disable(true):: 0x0 00:56:28: DSL 0/0 xdsl_gsi_int_disable(false):: 0x1 00:56:28: DSL 0/0 framer intr_status 0xC8 00:56:28: DSL 0/0 xdsl_gsi_int_disable(true):: 0x0 00:56:28: DSL 0/0 xdsl_gsi_int_disable(false):: 0x1 00:56:28: DSL 0/0 framer intr_status 0xC2 00:56:28: DSL 0/0 xdsl_gsi_int_disable(true):: 0x0 00:56:28: DSL 0/0 xdsl_gsi_int_disable(false):: 0x1 00:56:33: DSL 0/0 framer intr_status 0xC8 00:56:33: DSL 0/0 xdsl_gsi_int_disable(true):: 0x0 00:56:33: DSL 0/0 xdsl_gsi_int_disable(false):: 0x1 00:56:33: DSL 0/0 framer intr_status 0xC2 00:56:33: DSL 0/0 xdsl_gsi_int_disable(true):: 0x0 00:56:33: DSL 0/0 00:56:33: DSL 0/0 framer intr_status 0xC8 xdsl_gsi_int_disable(false):: 0x1 00:56:33: DSL 0/0 xdsl_gsi_int_disable(true):: 0x0 00:56:33: DSL 0/0 xdsl_gsi_int_disable(false):: 0x1 00:56:33: DSL 0/0 framer intr_status 0xC8 00:56:33: DSL 0/0 xdsl_gsi_int_disable(true):: 0x0
debug xdsl eoc --Displays what is in the embedded operations channel messages. The following example shows the use of the debug xdsl eoc command and sample output.
Router# debug xdsl eoc *Jan 3 18:34:46.824: %CONTROLLER-5-UPDOWN: Controller DSL 0/0, changed state to up *Jan 3 18:34:46.924: DSL 0/0: line 0 EOC Rcv Intr :: 0x4 *Jan 3 18:34:46.924: DSL 0/0:Current length 40 GTI_OK *Jan 3 18:34:46.924: DSL 0/0:msg rcvd line 0 *Jan 3 18:34:46.924: DSL 0/0: GT_FAIL *Jan 3 18:34:46.924: eoc_get_message for line::0 *Jan 3 18:34:46.924: Rx EOC remove transparency:: 1F 1 0 46 10 *Jan 3 18:34:46.928: data_transparency_remove: Done, eoc packet size = 5 *Jan 3 18:34:46.928: Good eoc packet received *Jan 3 18:34:46.928: incoming request eocmsgid: 1 from line 0 *Jan 3 18:34:46.928: Tx Converted EOC message:: 21 81 1 43 43 49 53 43 4F 0 0 0 2 1 0 E9 61 *Jan 3 18:34:46.932: data_transparency_add: eoc packet size - before 17, after 17 *Jan 3 18:34:47.020: DSL 0/0: line 0 EOC Rcv Intr :: 0x4 *Jan 3 18:34:47.020: DSL 0/0:Current length 40 GTI_OK *Jan 3 18:34:47.020: DSL 0/0:msg rcvd line 0 *Jan 3 18:34:47.020: DSL 0/0: GT_FAIL *Jan 3 18:34:47.020: eoc_get_message for line::0 *Jan 3 18:34:47.020: Rx EOC remove transparency:: 12 2 74 8A *Jan 3 18:34:47.024: data_transparency_remove: Done, eoc packet size = 4 *Jan 3 18:34:47.024: Good eoc packet received *Jan 3 18:34:47.024: incoming request eocmsgid: 2 from line 0 *Jan 3 18:34:47.024: Tx Converted EOC message:: 21 82 1 0 0 0 0 0 52 33 2E 30 2E 31 43 4E 53 38 44 44 30 41 41 41 43 43 49 53 43 4F 0 0 0 57 49 43 2D 53 48 44 53 4C 2D 56 32 46 4F 43 30 38 33 37 35 55 41 4C 0 31 32 2E 34 28 33 2E 35 2E 31 29 0 66 74 *Jan 3 18:34:47.044: data_transparency_add: eoc packet size - before 71, after 71 *Jan 3 18:34:47.116: DSL 0/0: line 0 EOC Rcv Intr :: 0x4 *Jan 3 18:34:47.116: DSL 0/0:Current length 40 GTI_OK *Jan 3 18:34:47.116: DSL 0/0:msg rcvd line 0 *Jan 3 18:34:47.116: DSL 0/0: GT_FAIL *Jan 3 18:34:47.116: eoc_get_message for line::0 *Jan 3 18:34:47.116: Rx EOC remove transparency:: 12 3 0 0 6D E9 *Jan 3 18:34:47.120: data_transparency_remove: Done, eoc packet size = 6 *Jan 3 18:34:47.120: Good eoc packet received *Jan 3 18:34:47.120: incoming request eocmsgid: 3 from line 0 *Jan 3 18:34:47.120: Tx Converted EOC message:: 21 83 0 0 0 1 AC *Jan 3 18:34:47.120: data_transparency_add: eoc packet size - before 7, after 7 GSI Tx buffer yet to transmit *Jan 3 18:34:47.212: DSL 0/0: line 0 EOC Rcv Intr :: 0x4 *Jan 3 18:34:47.212: DSL 0/0:Current length 40 GTI_OK *Jan 3 18:34:47.212: DSL 0/0:msg rcvd line 0 *Jan 3 18:34:47.212: DSL 0/0: GT_FAIL *Jan 3 18:34:47.212: eoc_get_message for line::0 *Jan 3 18:34:47.212: Rx EOC remove transparency:: 12 5 0 0 0 E9 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 32 42 *Jan 3 18:34:47.216: data_transparency_remove: Done, eoc packet size = 24 *Jan 3 18:34:47.216: Good eoc packet received *Jan 3 18:34:47.216: incoming request eocmsgid: 5 from line 0 *Jan 3 18:34:47.220: Tx Converted EOC message:: 21 85 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1E AB *Jan 3 18:34:47.224: data_transparency_add: eoc packet size - before 26, after 26 GSI Tx buffer yet to transmit GSI Tx buffer yet to transmit *Jan 3 18:34:47.224: DSL 0/0: line 0 EOC Rcv Intr :: 0x4 *Jan 3 18:34:47.224: DSL 0/0: Current length 40 GTI_EOM *Jan 3 18:34:47.224: DSL 0/0: GT_FAIL *Jan 3 18:34:51.824: xdsl_background_process: *Jan 3 18:34:51.824: sending request eocmsgid: 12 *Jan 3 18:34:51.824: Tx Converted EOC message:: 21 C C0 FF *Jan 3 18:34:51.824: data_transparency_add: eoc packet size - before 4, after 4 *Jan 3 18:34:51.824: size of eoc full status request :: 2 *Jan 3 18:34:51.928: DSL 0/0: line 0 EOC Rcv Intr :: 0x4 *Jan 3 18:34:51.928: DSL 0/0:Current length 40 GTI_OK *Jan 3 18:34:51.928: DSL 0/0:msg rcvd line 0 *Jan 3 18:34:51.928: DSL 0/0: GT_FAIL *Jan 3 18:34:51.928: eoc_get_message for line::0 *Jan 3 18:34:51.928: Rx EOC remove transparency:: 12 C A 63 *Jan 3 18:34:51.932: data_transparency_remove: Done, eoc packet size = 4 *Jan 3 18:34:51.932: Good eoc packet received *Jan 3 18:34:51.932: incoming request eocmsgid: 12 from line 0 *Jan 3 18:34:51.932: Tx Converted EOC message:: 21 8C 0 F D3 1 0 0 5 2 46 5 1 44 59 *Jan 3 18:34:51.932: data_transparency_add: eoc packet size - before 15, after 15 *Jan 3 18:34:51.936: size of eoc status response :: 13 *Jan 3 18:34:51.936: Tx Converted EOC message:: 21 8C 0 10 D3 1 0 0 6 1 46 5 2 50 2C *Jan 3 18:34:51.936: data_transparency_add: eoc packet size - before 15, after 15 *Jan 3 18:34:51.936: size of eoc status response :: 13 *Jan 3 18:34:51.940: Tx Converted EOC message:: 21 89 4 DB 82 *Jan 3 18:34:51.940: data_transparency_add: eoc packet size - before 5, after 5 *Jan 3 18:34:51.940: size of eoc status response :: 3GSI Tx buffer yet to transmit GSI Tx buffer yet to transmit *Jan 3 18:34:52.024: DSL 0/0: line 0 EOC Rcv Intr :: 0x4 *Jan 3 18:34:52.024: DSL 0/0:Current length 40 GTI_OK *Jan 3 18:34:52.024: DSL 0/0:msg rcvd line 0 *Jan 3 18:34:52.024: DSL 0/0: GT_FAIL *Jan 3 18:34:52.024: eoc_get_message for line::0 *Jan 3 18:34:52.024: Rx EOC remove transparency:: 12 11 6E A8 *Jan 3 18:34:52.024: data_transparency_remove: Done, eoc packet size = 4 *Jan 3 18:34:52.028: Good eoc packet received *Jan 3 18:34:52.028: incoming request eocmsgid: 17 from line 0 *Jan 3 18:34:52.028: Tx Converted EOC message:: 21 91 0 0 0 D6 56 *Jan 3 18:34:52.028: data_transparency_add: eoc packet size - before 7, after 7 *Jan 3 18:34:52.028: size of eoc status response :: 5GSI Tx buffer yet to transmit GSI Tx buffer yet to transmit *Jan 3 18:34:52.120: DSL 0/0: line 0 EOC Rcv Intr :: 0x4 *Jan 3 18:34:52.120: DSL 0/0:Current length 40 GTI_OK *Jan 3 18:34:52.120: DSL 0/0:msg rcvd line 0 *Jan 3 18:34:52.120: DSL 0/0: GT_FAIL *Jan 3 18:34:52.120: eoc_get_message for line::0 *Jan 3 18:34:52.120: Rx EOC remove transparency:: 12 8C 0 3 0 B 7 5 D8 4 5F 6 1 27 64 *Jan 3 18:34:52.124: data_transparency_remove: Done, eoc packet size = 15 *Jan 3 18:34:52.124: Good eoc packet received *Jan 3 18:34:52.216: DSL 0/0: line 0 EOC Rcv Intr :: 0x4 *Jan 3 18:34:52.216: DSL 0/0:Current length 40 GTI_OK *Jan 3 18:34:52.216: DSL 0/0:msg rcvd line 0 *Jan 3 18:34:52.216: DSL 0/0: GT_FAIL *Jan 3 18:34:52.216: eoc_get_message for line::0 *Jan 3 18:34:52.216: Rx EOC remove transparency:: 12 8C 0 5 0 3 0 0 12 3 2 26 2 1C 4F *Jan 3 18:34:52.220: data_transparency_remove: Done, eoc packet size = 15
debug xdsl error --Displays error messages. The following example shows the debug xdsl errorcommand.
Router# debug xdsl error xDSL error debugging is on Router#
Configuration Examples for ATM Mode for Two-Wire or Four-Wire SHDSL
Router A CPE Configuration Example
controller DSL 1/2 mode atm line-term cpe line-mode 2-wire line-zero dsl-mode shdsl symmetric annex B ! ! ! ! connect hp DSL 1/0 0 DSL 1/2 0 ! !
Router B CO Configuration Example
Current configuration : 3183 bytes ! version 12.3 service timestamps debug uptime service timestamps log uptime no service password-encryption ! hostname 3725 ! boot-start-marker boot system flash c3725-is-mz.0424 boot system tftp shriv/c3725-is-mz.new 223.255.254.254 boot-end-marker ! ! memory-size iomem 25 no network-clock-participate slot 1 no network-clock-participate slot 2 no network-clock-participate wic 0 no network-clock-participate wic 1 no network-clock-participate wic 2 no network-clock-participate aim 0 no network-clock-participate aim 1 no aaa new-model ip subnet-zero ip cef ! ! ! ! ! ! ! controller DSL 0/0 mode atm line-term co line-mode 4-wire enhanced dsl-mode shdsl symmetric annex B line-rate 4608 ! controller DSL 0/1 mode atm line-term co line-mode 4-wire enhanced dsl-mode shdsl symmetric annex B line-rate 4608 controller DSL 0/2 mode atm line-term co line-mode 4-wire enhanced dsl-mode shdsl symmetric annex B line-rate 4608 ! controller DSL 1/0 mode atm line-term co line-mode 4-wire enhanced dsl-mode shdsl symmetric annex B line-rate 4608 ! ! ! interface ATM0/0 no ip address load-interval 30 no atm ilmi-keepalive clock rate aal5 8000000 ! interface ATM0/0.1 point-to-point ip address 5.0.0.1 255.0.0.0 pvc 2/100 vbr-rt 2000 2000 oam-pvc 0 encapsulation aal5mux ip ! ! interface FastEthernet0/0 ip address 1.3.208.25 255.255.0.0 duplex auto speed auto no cdp enable ! interface ATM0/1 no ip address load-interval 30 no atm ilmi-keepalive clock rate aal5 5300000 ! interface ATM0/1.1 point-to-point ip address 6.0.0.1 255.0.0.0 pvc 2/100 cbr 4608 ! ! interface FastEthernet0/1 mac-address 0000.0000.0011 ip address 70.0.0.2 255.0.0.0 secondary ip address 90.0.0.2 255.0.0.0 secondary ip address 50.0.0.2 255.0.0.0 load-interval 30 speed 100 full-duplex no cdp enable ! interface ATM0/2 no ip address no atm ilmi-keepalive clock rate aal5 8000000 ! interface ATM0/2.1 point-to-point ip address 7.0.0.1 255.0.0.0 pvc 2/100 vbr-nrt 4608 4200 ! ! interface ATM1/0 no ip address load-interval 30 no atm ilmi-keepalive clock rate aal5 5300000 ! interface ATM1/0.1 point-to-point ip address 8.0.0.1 255.0.0.0 pvc 2/100 vbr-nrt 4608 4608 ! ! interface FastEthernet1/0 no ip address shutdown duplex auto speed auto no cdp enable ! interface FastEthernet1/1 no ip address shutdown duplex auto speed auto no cdp enable ! ip default-gateway 172.19.163.44 ip classless ip route 60.0.0.0 255.0.0.0 ATM1/0.1 ip route 80.0.0.0 255.0.0.0 ATM0/1.1 ip route 223.255.254.254 255.255.255.255 FastEthernet0/0 ip route 223.255.254.254 255.255.255.255 1.3.0.1 ip http server ! ! access-list 101 permit ip host 20.0.0.2 host 20.0.0.1 snmp-server community public RO snmp-server enable traps tty no cdp run ! ! ! control-plane ! ! ! ! ! ! ! alias exec c conf t ! line con 0 exec-timeout 0 0 privilege level 15 line aux 0 line vty 0 4 exec-timeout 0 0 privilege level 15 no login ! end
Additional References
For additional information related to the ATM Mode for Two-Wire or Four-Wire SHDSL feature, refer to the following references.
Related Documents
Related Topic |
Document Title |
---|---|
1-port G.SHDSL WAN interface card |
1-Port G.SHDSL WAN Interface Card for Cisco 2600 Series and Cisco 3600 Series Routers, Release 12.2(8)T |
Voice configuration |
Cisco IOS Voice Configuration Library, Release 12.3 |
Voice commands |
Cisco IOS Voice Command Reference, Release 12.3 |
IP configuration |
Cisco IOS IP Configuration Guide , Release 12.3 |
ATM configuration |
"Configuring ATM" in the Wide-Area Networking Configuration Guide, Release 12.3 |
Voice over ATM with AAL5 and AAL2 support |
Voice over ATM, Release 12.3 |
Standards
Standards |
Title |
---|---|
ITU-T G.991.2 (SHDSL) |
Single-Pair High-Speed Digital Subscriber Line (SHDSL) Transceivers |
ITU-T G.994.1 (G.HDSL) |
Handshake Procedures for Digital Subscriber Line (DSL) Transceivers |
MIBs
MIBs |
MIBs Link |
---|---|
To locate and download MIBs for selected platforms, Cisco IOS releases, and feature sets, use Cisco MIB Locator found at the following URL: |
RFCs
RFCs |
Title |
---|---|
No new or modified RFCs are supported by this feature and support for existing RFCs has not been modified by this feature. |
-- |
Technical Assistance
Description |
Link |
---|---|
Technical Assistance Center (TAC) home page, containing 30,000 pages of searchable technical content, including links to products, technologies, solutions, technical tips, and tools. Registered Cisco.com users can log in from this page to access even more content. |
Feature Information for ATM Mode for Two-Wire or Four-Wire SHDSL
The following table provides release information about the feature or features described in this module. This table lists only the software release that introduced support for a given feature in a given software release train. Unless noted otherwise, subsequent releases of that software release train also support that feature.
Use Cisco Feature Navigator to find information about platform support and Cisco software image support. To access Cisco Feature Navigator, go to . An account on Cisco.com is not required.
Feature Name |
Releases |
Feature Information |
---|---|---|
ATM Mode for Two-Wire or Four-Wire SHDSL |
12.3(4)XD 12.3(4)XG 12.3(7)T 12.3(4)XG1 12.3(11)T 12.3(14)T 12.4(2)XA 12.4(5)
|
In Cisco IOS Release 12.3(4)XD, this feature (WIC-1SHDSL-V2) was introduced on the Cisco 2600 series and Cisco 3700 series routers to add 4-wire support. 2-wire support was previously available in Cisco IOS Release 12.2(8)T. For more information, see the document "1-Port G.SHDSL WAN Interface Card for Cisco 2600 Series and Cisco 3600 Series Routers". This feature (WIC-1SHDSL-V2) was integrated into Cisco IOS Release 12.3(4)XG on the Cisco 1700 series routers. This feature (WIC-1SHDSL-V2) was integrated into the Cisco IOS Release 12.3(7)T on the Cisco 2600 series, Cisco 3631, and Cisco 3700 series routers. Cisco 1700 series routers do not support the WIC-1SHDSL-V2 in this release. In Cisco IOS Release 12.3(4)XG1, support for the auto line-mode feature was added. In Cisco IOS Release 12.3(11)T, support for the following was added: additional annex parameters for Cisco 1700, Cisco 2600, Cisco 2800, Cisco 3631, Cisco 3700, and Cisco 3800 series routers; the HDSL2-SHDSL-LINE-MIB (RFC3276); and support for the ATM Mode for SHDSL feature was added for Cisco 2800 series and Cisco 3800 series routers. In Cisco IOS Release 12.3(14)T, support was added for Cisco 1800 series routers and the Cisco 2801 integrated services router. In Cisco IOS Release 12.4(2)XA, support was added for the WIC-1SHDSL-V3 interface card. Support for the WIC-1SHDSL-V3 interface card was integrated into the Cisco IOS Release 12.4(5) The following commands were introduced or modified: controller dsl, dsl-mode shdsl symmetric annex, ignore-error-duration, line-mode, line-rate, line-term, loopback (DSL controller), show controller dsl, snr margin, debug xdsl application, debug xdsl driver, debug xdsl eoc, debug xdsl error. |
Glossary
ABR--available bit rate. An ATM service type in which the ATM network makes a "best effort" to meet the transmitter’s bandwidth requirements. ABR uses a congestion feedback mechanism that allows the ATM network to notify the transmitters that they should reduce their rate of data transmission until the congestion decreases. Thus, ABR offers a qualitative guarantee that the transmitter’s data can get to the intended receivers without unwanted cell loss.
ATM--Asynchronous Transfer Mode. A form of digitized data transmission based on fixed-length cells that can carry data, voice, and video at high speeds.
CBR--constant bit rate. A data transmission that can be represented by a nonvarying, or continuous, stream of bits or cell payloads. Applications such as voice circuits generate CBR traffic patterns. CBR is an ATM service type in which the ATM network guarantees to meet the transmitter’s bandwidth and quality-of-service (QoS) requirements.
CO--central office. Local telephone company office to which all local loops in a given area connect and in which circuit switching of subscriber lines occur.
CPE--customer premises equipment. CPE includes devices, such as CSU/DSUs, modems, and ISDN terminal adapters, required to provide an electromagnetic termination for wide-area network circuits before connecting to the router or access server. This equipment was historically provided by the telephone company, but is now typically provided by the customer in North American markets.
Downstream--Refers to the transmission of data from the central office (CO or COE) to the customer premises equipment (CPE).
G.SHDSL--Multirate Symmetrical High-Speed Digital Subscriber Line.
UBR--unspecified bit rate. QoS class defined by the ATM Forum for ATM networks. UBR allows any amount of data up to a specified maximum to be sent across the network, but there are no guarantees in terms of cell loss rate and delay. Compare with ABR (available bit rate), CBR, and VBR.
Upstream--Refers to the transmission of data from the customer premises equipment (CPE) to the central office equipment (CO or COE).
VBR--variable bit rate. QOS class defined by the ATM Forum for ATM networks. VBR is subdivided into a real time (rt) class and non-real time (nrt) class.
VBR-rt--VBR-real-time is used for connections in which there is a fixed timing relationship between samples.
VBR-nrt--VBR-non-real-time is used for connections in which there is no fixed timing relationship between samples, but that still need a guaranteed QoS. Compare with ABR, CBR, and UBR.
Note | Refer to the Internetworking Terms and Acronyms for terms not included in this glossary. |