Clock Recovery System for SAToP

The Clock Recovery System recovers the service clock using Adaptive Clock Recovery (ACR) and Differential Clock Recovery (DCR).

Prerequisites for Clock Recovery

  • The clock of interface modules must be used as service clock.

  • CEM must be configured before configuring the global clock recovery.

  • RTP must be enabled for DCR in CEM, as the differential clock information is transferred in the RTP header.

Restrictions for Clock Recovery

  • The reference clock source is used and locked to a single clock.

  • The clock ID should be unique for a particular interface module for ACR or DCR configuration.

  • ACR clock configuration under each controller should be performed before configuring CEM group.

Finding Feature Information

Your software release may not support all the features documented in this module. For the latest caveats and feature information, see Bug Search Tool and the release notes for your platform and software release. To find information about the features documented in this module, and to see a list of the releases in which each feature is supported, see the feature information table.

Use Cisco Feature Navigator to find information about platform support and Cisco software image support. To access Cisco Feature Navigator, go to www.cisco.com/go/cfn. An account on Cisco.com is not required.

Adaptive Clock Recovery (ACR)

Adaptive Clock Recovery (ACR) is an averaging process that negates the effect of random packet delay variation and captures the average rate of transmission of the original bit stream. ACR recovers the original clock for a synchronous data stream from the actual payload of the data stream. In other words, a synchronous clock is derived from an asynchronous packet stream. ACR is a technique where the clock from the TDM domain is mapped through the packet domain, but is most commonly used for Circuit Emulation (CEM). ACR is supported on unframed and framed modes of SAToP.

Note

Framing type should be maintained same in all routers end to end.


Effective Cisco IOS XE Everest 16.5.1, ACR is supported on the 8-port T1/E1 interface module.

Benefits of ACR for 8 T1/E1 Interface Module

  • Customer-edge devices (CEs) can have different clocks from that of the Provide-edge devices (PEs). Every T1/E1 interface module supports eight pseudowires (or the derived clocks).

Restrictions for ACR on 8 T1/E1 Interface Module

  • ACR is supported only on the 8-port T1/E1 interface module (A900-IMA8D). It is not supported on the 16-port T1/E1 interface module (A900-IMA16D), the 32-port T1/E1 interface module (A900-IMA32D), or the 4-port OC3 interface module (A900-IMA4OS).

  • ACR is supported only for unframed and framed CEM (SAToP) and for fully-framed CEM (CESoPSN). Fully-framed refers to all the timeslots of T1 (1-24 ) or E1 (1-31) interfaces.

  • ACR is supported only for CEM circuits with MPLS PW encapsulation. ACR is not supported for CEM circuits with UDP or IP PW encapsulation.

  • The clock recovered by an ACR clock for a CEM circuit is local to that CEM circuit. The recovered clock cannot be introduced to another circuit and also cannot be introduced to the system clock as a frequency input source.

  • The clock ID should be unique for the entire device.

  • Physical or soft IM OIR causes the APS switchover time to be higher (500 to 600 ms). Shut or no shut of the port and removal of the active working or protect also cause the APS switchover time to be high.

    To overcome these issues, force the APS switchover.

Prerequisites for ACR Configuration in 8 T1/E1 Interface Module

  • Ensure that CEM is configured before configuring the adaptive clock recovery.

  • The following must be configured before configuring the ACR:
    • The remote Customer Equipment and the remote Provider Edge device. These can be configured by using the clock source internal and the clock source line commands under the T1/E1 controller.

    • The controller on the local Customer Equipment connected to the ACR router by using the clock source line command.

    • PRC or PRS reference clock from a GPS reference to the remote Customer Equipment or remote CEM Provider Edge device.

Configuring ACR for T1 Interfaces for SAToP

To configure the clock on T1/E1 interfaces for SAToP in controller mode:
 
enable
configure terminal
controller t1 0/4/3
clock source recovered 15
cem-group 20 unframed
exit
To configure the clock recovery on T1/E1 interfaces in global configuration mode:
 
recovered-clock 0 4
clock recovered 15 adaptive cem 3 20
exit

Note

The clock source recovered configuration on the controller must be completed before configuring the clock recovery in global configuration mode.



Note

On the controller, the clock source should be configured before CEM group is configured.


To remove the clock configuration in ACR, you must remove the recovery clock configuration in global configuration mode, then remove the CEM circuit, and finally remove the clock source recovered configuration under the controller.

Verifying the ACR Configuration of T1 Interfaces for SAToP

Important Notes
  • When multiple ACR clocks are provisioned and if the core network or PSN traffic load primarily has fixed packet rate and fixed size packets, the states of one or more ACR clocks might flap between Acquiring and Acquired states and might not be stable in Acquired state.

    This happens because of the "beating" phenomenon and is documented in ITU-T G.8261 - Timing and synchronization aspects in packet networks.

    This is an expected behavior.

  • After an ACR clock is provisioned and starts recovering the clock, a waiting period of 15-20 minutes is mandatory before measuring MTIE for the recovered clock.

    This behavior is documented in ITU-T G.8261 Timing and synchronization aspects in packet networks Appendix 2.

  • When the input stream of CEM packets from the core network or PSN traffic is lost or has many errors, the ACR clock enters the HOLDOVER state. In this state, the ACR clock fails to provide an output clock on the E1/T1 controller. Hence, during the HOLDOVER state, MTIE measurement fails.

    This is an expected behavior.

  • When the clock output from the clock master or GPS reference flaps or fails, the difference in the characteristics between the holdover clock at the source device and the original GPS clock may result in the ACR algorithm failing to recover clock for a transient period. The MTIE measurement for the ACR clock fails during this time. After this transient period, a fresh MTIE measurement is performed. Similarly, when the GPS clock recovers, for the same difference in characteristics, ACR fails to recover clock and MTIE fails for a transient period.

    This is an expected behavior.

  • When large-sized packets are received along with the CEM packets by the devices in the core network or PSN traffic, CEM packets may incur delay with variance in delay. As ACR is susceptible to delay and variance in delay, MTIE measurement may fail. This behavior is documented in ITU-T G.8261 section 10.

    This is an expected behavior.

  • For a provisioned ACR clock that is in Acquired state, if the ACR clock configuration under the recovered-clock global configuration mode is removed and then reconfigured, the status of the ACR clock may initially be ACQUIRED and not FREERUN and then move to Acquiring. This happens because the ACR clock is not fully unprovisioned until the CEM circuit and the controller clock source recovered configuration are removed. Hence, the clock starts from the old state and then re-attempts to recover the clock.

    This is an expected behavior.

Use the show recovered-clock command to verify the ACR of T1 interfaces for SAToP:

Router#show recovered-clock
Recovered clock status for subslot 0/1
----------------------------------------
Clock Type Mode Port CEM Status Frequency Offset(ppb)
1 T1/E1 ADAPTIVE 3 1 ACQUIRED 100

Use the show running-config command to verify the recovery of adaptive clock of T1 interfaces:

Router#show running-config
controller T1 0/1/2
clock source recovered 1
cem-group 1 unframed
interface CEM0/1/3
cem 1
no ip address
xconnect 2.2.2.2 10 
encapsulation mpls

Associated Commands

Commands

Links

cem-group

http://www.cisco.com/c/en/us/td/docs/ios-xml/ios/interface/command/ir-cr-book/ir-c1.html#wp2440628600

clock source

http://www.cisco.com/c/en/us/td/docs/ios-xml/ios/interface/command/ir-cr-book/ir-c2.html#wp3848511150

clock recovered adaptive cem

http://www.cisco.com/c/en/us/td/docs/ios-xml/ios/interface/command/ir-cr-book/ir-c2.html#wp8894393830

controller t1

http://www.cisco.com/c/en/us/td/docs/ios-xml/ios/interface/command/ir-cr-book/ir-c2.html#wp1472647421

recovered-clock

http://www.cisco.com/c/en/us/td/docs/ios-xml/ios/interface/command/ir-cr-book/ir-c2.html

Configuring ACR for OCn

Configuring ACR in Mode VT15 for SAToP

You must configure ACR for virtual tributary groups (VTG) mode. In this mode, a single STS-1 is divided into seven VTGs. Each VTG is then divided into four VT1.5, each carrying a T1.

To configure ACR in mode VT15 for Structure-Agnostic TDM over Packet (SAToP):

enable
configure terminal
controller sonet <bay>/<slot>/<port>
rate OC3
sts-1 <number>
mode vt-15
vtg 1 t1 cem 0 unframed
vtg 1 t1 1 clock source recovered 1
vtg <vtg_number> t1 <t1_number> cem-group < cem-group-no> unframed
vtg <vtg_number> t1 <t1_number> clock source recovered <clock-id>
exit
recovered-clock 0 <0-15> Subslot number
end

Verifying ACR in Mode VT15 for SAToP

Verifying ACR Configuration
Router# show running-config | section 0/4/0

controller MediaType 0/4/0
 mode sonet
controller SONET 0/4/0
 rate OC48
 no ais-shut
 framing sonet
 clock source internal
 !
 sts-1 1
  clock source internal
  mode vt-15	
  vtg 1 t1 1 clock source Recovered 0
  vtg 1 t1 1 framing unframed
  vtg 1 t1 1 cem-group 0 unframed

interface CEM0/4/0
 no ip address
 cem 0
!
Verifying Recovered Clock
Router# show recovered-clock

Recovered clock status for subslot 0/3
----------------------------------------
Clock    Type     Mode        CEM    Status         Frequency Offset(ppb)  Circuit-No
0        OCx-ds1  ADAPTIVE     0    ACQUIRED   n/a                             0/1/1/1 (Port/path/vtg/t1)
Router# show running-config | section recovered-clock 0 4

recovered-clock 0 4
 clock recovered 0 adaptive cem 0 0

Configuring ACR in mode T3 for SAToP

You must configure ACR in mode T3. Mode T3 is STS-1 or AU-4/TUG3 carrying an unchannelized (clear channel) T3.

enable
configure terminal
recovered-clock  <bay> <slot>
clock recovered <clock-id> adaptive cem <port-no> <cem-group-no>
controller sonet <bay>/<slot>/<port>
rate OC3
sts-1 <number>
mode t3
cem-group < cem-group-no> unframed
t3 clock source recovered <clock-id>

end

Verifying ACR in Mode T3 for SAToP

Verifying ACR Configuration
Router# show run | sec recovered
recovered-clock bay/slot 
clock recovered clock_id adaptive cem cem-group-no port-no 
! 
Router# show running-config | section 0/4/6

controller SONET 0/4/6
 rate OC3
 no ais-shut
 framing sonet
 clock source internal
 !
 sts-1 1
  clock source internal
  mode t3
  t3 clock source line
  cem-group 0 unframed
  clock source recovered 20

interface CEM0/4/6
 no ip address
 cem 0
!
Verifying Recovered Clock
Router# show recovered-clock

Recovered clock status for subslot 0/3
----------------------------------------
Clock    Type         Mode        CEM    Status        Frequency Offset(ppb)  Circuit-No
0         OCx-ds3  ADAPTIVE     0    ACQUIRED   n/a                               0/1 (Port/t3)
Router# show run | sec recovered

recovered-clock 0 4
clock recovered 20 adaptive cem 6 0
!

Configuring ACR in Mode CT3 for SAToP

You must configure ACR in mode CT3. Mode CT3 is an STS-1 carrying a DS3 signal that is divided into 28 T1s (PDH).

enable
configure terminal
recovered-clock  <bay> <slot>
clock recovered <clock-id> adaptive cem <port-no> <cem-group-no>
controller sonet <bay>/<slot>/<port>
rate OC3
sts-1 <number>
mode ct3
t1 <t1_number> cem-group < cem-group-no> unframed
t1 <t1_number> clock source recovered <clock-id>
enable

Verifying ACR in Mode CT3 for SAToP

Verifying ACR Configuration
Router# show running-config | section 0/4/0

controller MediaType 0/4/0
 mode sonet
controller SONET 0/4/0
 rate OC48
 no ais-shut
 framing sonet
 clock source internal
 !
 sts-1 1
  clock source internal
  mode ct3
  t3 framing c-bit
  t1 1 clock source Recovered 10
  t1 1 framing unframed
  t1 1 cem-group 1 unframed

interface CEM0/4/0
 no ip address
 cem 1
!
Verifying Recovered Clock
show recovered-clock

Recovered clock status for subslot 0/3
----------------------------------------
Clock    Type     Mode        CEM    Status        Frequency Offset(ppb)  Circuit-No
0        OCx-ds1  ADAPTIVE     0    ACQUIRED  n/a                             0/1/1 (Port/t3/t1)
show running-config | section recovered-clock 0 4
recovered-clock 0 4
 clock recovered 10 adaptive cem 1 0

Differential Clock Recovery (DCR)

Differential Clock Recovery (DCR) is another technique used for Circuit Emulation (CEM) to recover clocks based on the difference between PE clocks. TDM clock frequency are tuned to receive differential timing messages from the sending end to the receiving end. A traceable clock is used at each end, which ensures the recovered clock is not affected by packet transfer. DCR is supported on unframed and framed modes of SAToP.

Note

Framing type should be maintained same in all routers end to end.


Explicit Pointer Adjustment Relay (EPAR)

A pointer management system is defined as part of the definition of SONET. If there is a frequency offset between the frame rate of the transport overhead and that of the SONET Synchronous Payload Envelope (SPE), the alignment of the SPE slips back periodically or advances in time through positive or negative stuffing. Similarly, if there is a frequency offset between the SPE rate and the VT rate it carries, the alignment of the VT slips back periodically or advances in time through positive or negative stuffing within the SPE. The emulation of this aspect of SONET network in pseudowire emulation network may be accomplished using EPAR feature.

EPAR uses N and P bits in CEP header to signal negative or positive pointer justification event. EPAR is supported on STS-1, STS-3C, STS-12C, STS-48C and VT-1.5 levels. N and P counters are added to communicate the signaling of the pointer events over CEP pseudowire.

Figure 1. EPAR

Effective Cisco IOS-XE Release 3.18 SP, EPAR is enabled by default.

Restrictions for EPAR

  • EPAR is applicable only for circuit emulation for SONET LO & HO paths and is not applicable for PDH.

  • EPAR is effective only when both ends of the pseudowire have access to a common timing reference.

Benefits of Clock Recovery

  • Customer-edge devices (CEs) can have different clock from that of the Provide-edge devices (PEs).

Scaling Information

IM Card

Pseudowires Supported (Number of Clocks Derived)

DS1

48

DS3

1344

1-Port OC192/STM-64 or 8-Port OC3/12/48/STM-1/-4/-16 Interface Module

2000

Configuring DCR for OCn

Configuring DCR in Mode VT15 for SAToP

enable
configure terminal
recovered-clock  <bay> <slot>
clock recovered <clock-id> differential cem <port-no> <cem-group-no>
controller sonet <bay>/<slot>/<port>
rate OC3
sts-1 <number>
mode vt-15
vtg <vtg_no> t1 <t1_number> cem-group <cem-group-no> unframed
vtg <vtg_no> t1 <t1_number> clock source recovered <clock-id>
interface cem <bay>/<slot>/<port>
cem <cem-group-number>
rtp-present
end

Verifying DCR in Mode VT15 for SAToP

Verifying DCR Configuration

Router# show running-config | section 0/4/0

controller MediaType 0/4/0
 mode sonet
controller SONET 0/4/0
 rate OC48
 no ais-shut
 framing sonet
 clock source internal
 !
 sts-1 1
  clock source internal
  mode vt-15
  vtg 1 t1 1 clock source Recovered 0
  vtg 1 t1 1 framing unframed
  vtg 1 t1 1 cem-group 0 unframed


interface CEM0/4/0
 no ip address
 cem 0
  rtp-present
 !

Verifying Recovered Clock

Router# show recovered-clock

Recovered clock status for subslot 0/4
----------------------------------------
Clock    Type     Mode        CEM    Status         Frequency Offset(ppb)  Circuit-No
0        OCx-ds1  Differential     0    ACQUIRED   n/a                             0/1/1/1 (Port/path/vtg/t1)
Router# show running-config | section recovered-clock 0 4

recovered-clock 0 4
 clock recovered 0 differential cem 0 0

Configuring DCR in Mode CT3 for SAToP

enable
configure terminal
recovered-clock  <bay> <slot>
clock recovered <clock-id> differential cem <port-no> <cem-group-no>
controller sonet <bay>/<slot>/<port>
rate OC3
sts-1 <number>
mode ct3
t1 <t1_number> cem-group < cem-group-no> unframed
t1 <t1_number> clock source recovered <clock-id>
interface cem <bay>/<slot>/<port>
cem <cem-group-number>
rtp-present
end

Verifying DCR in Mode CT3 for SAToP

Verifying DCR Configuration

Router# show running-config | section 0/4/0

controller MediaType 0/4/0
 mode sonet
controller SONET 0/4/0
 rate OC48
 no ais-shut
 framing sonet
 clock source internal
 !
 sts-1 1
  clock source internal
  mode ct3
  t3 framing c-bit
  t1 1 clock source Recovered 10
  t1 1 framing unframed
  t1 1 cem-group 1 unframed


interface CEM0/4/0
 no ip address
 cem 1
  rtp-present
 !

Verifying Recovered Clock

Router# show recovered-clock

Recovered clock status for subslot 0/4
----------------------------------------
Clock    Type     Mode        CEM    Status         Frequency Offset(ppb)  Circuit-No
0        OCx-ds1  Differential     0    ACQUIRED   n/a                             0/1/1 (Port/t3/t1)
Router# show running-config | section recovered-clock 0 4
recovered-clock 0 4
 clock recovered 10 differential cem 1 0

Configuring DCR in Mode T3 for SAToP

enable
configure terminal
recovered-clock  <bay> <slot>
clock recovered <clock-id> differential cem <port-no> <cem-group-no>
controller sonet <bay>/<slot>/<port>
rate OC3
sts-1 <number>
mode t3
cem-group <cem-group-number> unframed
t3 clock source recovered <clock-id>
interface cem <bay>/<slot>/<port>
cem <cem-group-nber>
rtp-present
end

Verifying DCR in Mode T3 for SAToP

Verifying DCR Configuration

Router# show running-config | section 0/4/6

controller SONET 0/4/6
 rate OC3
 no ais-shut
 framing sonet
 clock source internal
 !
 sts-1 1
  clock source internal
  mode t3
  cem-group 0 unframed
  clock source recovered 20

interface CEM0/4/6
 no ip address
 cem 0
  rtp-present
 !

Verifying Recovered Clock

Router# show recovered-clock

Recovered clock status for subslot 0/4
----------------------------------------
Clock    Type     Mode        CEM    Status         Frequency Offset(ppb)  Circuit-No
0        OCx-ds3  Differential     0    ACQUIRED   n/a                             0/1 (Port/t3)
Router# show running-config | section recovered-clock 0 4

recovered-clock 0 4
clock recovered 20 differential cem 6 0

Configuring ACR in Mode CT3 for CESoPSN

You must configure ACR in mode CT3. Mode CT3 is an STS-1 carrying a DS3 signal that is divided into 28 T1s (PDH).


enable
configure terminal
controller sonet <bay>/<slot>/<port>
rate OC3
sts-1 <num>
mode ct3
t1 <t1_num> clock source recovered <clock-id>
t1 <t1_num> cem-group < cem-group-no> timeslots <1-24>

recovered-clock  <bay> <slot>
clock recovered <clock-id> adaptive cem <port-no> <cem-group-no>

Verification of EPAR Configuration

The following example shows the configuration of EPAR for STS-3c with negative pointer adjustment events signaled using N-bits.

Router#show cem circuit interface cem 0/4/4 104

CEM0/4/4, ID: 104, Line: UP, Admin: UP, Ckt: ACTIVE
Controller state: up, CEP state: up
Idle Pattern: 0xFF, Idle CAS: 0x8
Dejitter: 6 (In use: 0)
Payload Size: 783
Framing: Not-Applicable
CEM Defects Set
None

Signalling: No CAS
RTP: No RTP

Ingress Pkts:    8507028158           Dropped:             0                   
Egress Pkts:     8507028151           Dropped:             0                   

CEM Counter Details
Input Errors:    0                    Output Errors:       0                   
Pkts Missing:    0                    Pkts Reordered:      0                   
Misorder Drops:  0                    JitterBuf Underrun:  0                   
Error Sec:       0                    Severly Errored Sec: 0                   
Unavailable Sec: 0                    Failure Counts:      0                   
Pkts Malformed:  0                    JitterBuf Overrun:   0                   
Generated Lbits: 0                    Received Lbits:      0                   
Generated Rbits: 0                    Received Rbits:      0                   
Generated Nbits: 81794328             Received Nbits:      81794328            
Generated Pbits: 0                    Received Pbits:      0           

Recovering a Clock

Recovering an ACR Clock

enable
configure terminal 
recovered-clock  <bay> <slot>
clock recovered <clock-id> adaptive cem <port-no> <cem-group-no>
end

Recovering a DCR Clock

enable
configure terminal
recovered-clock  <bay> <slot>
clock recovered <clock-id> differential cem <port-no> <cem-group-no>
end

Example: Adaptive Clock Recovery (ACR) for SAToP

Example: Adaptive Clock Recovery (ACR) Mode VT15 for SAToP

enable
configure terminal
recovered-clock  0 4
clock recovered 0 adaptive cem 0 0
controller SONET 0/4/0
rate OC48
sts-1 1
mode vt-15
vtg 1 t1 1 cem-group 0 unframed
vtg 1 t1 1 clock source Recovered 0
end

Example: Adaptive Clock Recovery (ACR) Mode CT3 for SAToP

enable
configure terminal
recovered-clock  0 4
clock recovered 10 adaptive cem 1 0
controller SONET 0/4/0
rate OC48
sts-1 1
mode ct-3
t1 1 cem-group 1 unframed
t1 1 clock source Recovered 10
end

Example: Adaptive Clock Recovery (ACR) Mode T3 for SAToP

enable
configure terminal
recovered-clock  0 4
clock recovered 20 adaptive cem 6 0
controller SONET 0/4/6
rate OC48
sts-1 1
mode t3
cem-group 0 unframed
t3 clock source recovered 20
end

Example: Differential Clock Recovery (DCR) for SAToP

Example: Differential Clock Recovery (DCR) Mode VT15 for SAToP

enable
configure terminal
recovered-clock 0 4
clock recovered 0 differential cem 0 0
controller SONET 0/4/0
rate OC48
sts-1 1
mode vt-15
vtg 1 t1 1 cem-group 0 unframed
vtg 1 t1 1 clock source Recovered 0
interface CEM 0/4/0
cem 1
rtp-present
end

Example: Differential Clock Recovery (DCR) Mode CT3 for SAToP

enable
configure terminal
recovered-clock 0 4
clock recovered 10 differential cem 1 0
controller SONET 0/4/0
rate OC48
sts-1 1
mode ct3
t1 1 cem-group 1 unframed
t1 1 clock source Recovered 10
interface CEM 0/4/0
cem 1
rtp-present
end

Example: Differential Clock Recovery (DCR) Mode T3 for SAToP

enable
configure terminal
controller SONET 0/4/0
rate OC48
sts-1 1
mode ct3
t1 1 cem-group 1 unframed
t1 1 clock source Recovered 10
recovered-clock 0 4
clock recovered 10 differential cem 0 1
interface CEM 0/4/0
cem 1
rtp-present
end

Additional References for Clock Recovery

Related Documents

Related Topic

Document Title

Cisco IOS commands

Cisco IOS Master Commands List, All Releases

Standards and RFCs

Standard/RFC

Title

ITU -T G.8261

Timing and synchronization aspects in packet networks

MIBs

MIB

MIBs Link

To locate and download MIBs for selected platforms, Cisco IOS releases, and feature sets, use Cisco MIB Locator found at the following URL:

http://www.cisco.com/go/mibs

Technical Assistance

Description

Link

The Cisco Support website provides extensive online resources, including documentation and tools for troubleshooting and resolving technical issues with Cisco products and technologies.

To receive security and technical information about your products, you can subscribe to various services, such as the Product Alert Tool (accessed from Field Notices), the Cisco Technical Services Newsletter, and Really Simple Syndication (RSS) Feeds.

Access to most tools on the Cisco Support website requires a Cisco.com user ID and password.

http://www.cisco.com/cisco/web/support/index.html