Server BIOS Tokens in Release 4.3(4b)
Cisco UCS Manager supports the following servers in 4.3(4b):
-
Cisco UCS C245 M8 Server
Note
This platform is supported from 4.3(4b) onwards.
-
Cisco UCS X410c M7 Compute Node
-
Cisco UCS X210c M7 Compute Node
-
Cisco UCS X210c M6 Compute Node
-
Cisco UCS C220 M7 Server
-
Cisco UCS C240 M7 Server
-
Cisco UCS C220 M6
-
Cisco UCS C240 M6
-
Cisco UCS C245 M6
-
Cisco UCS C225 M6
-
Cisco UCS B200 M6
-
Cisco UCS B200 M5
-
Cisco UCS B480 M5
-
Cisco UCS C220 M5
-
Cisco UCS C240 M5
-
Cisco UCS C240 SD M5
-
Cisco UCS C480 M5
-
Cisco UCS C480 M5 ML
-
Cisco UCS S3260 M5
-
Cisco UCS C125 M5
Related Documentation
-
For Cisco UCS C-series and B-series BIOS tokens supported on M7 servers, see Server BIOS Tokens in Release 4.3(4a).
-
For Cisco UCS C-series and B-series BIOS tokens supported on M7 servers, see Server BIOS Tokens in Release 4.3(3c) and Server BIOS Tokens in Release 4.3(3a).
-
For Cisco UCS C-series and B-series BIOS tokens supported on M7 servers, see Server BIOS Tokens in Release 4.3(2c) and Server BIOS Tokens in Release 4.3(2b).
-
For Cisco UCS C-series and B-series BIOS tokens supported on M6 servers, see Cisco UCS Server BIOS Tokens, Release 4.2.
-
For Cisco UCS C-series and B-series BIOS tokens supported on M5 servers, see Cisco UCS Server BIOS Tokens, Release 4.1.
New/Changed BIOS Tokens for 4.3(4b)
Name |
Default Value |
M8 Server Supported Values |
Platform |
New/Changed |
---|---|---|---|---|
MLOM Link Speed |
Auto |
Disabled, Auto, GEN1, GEN2, GEN3, GEN4, GEN5 |
C245 M8 |
New |
MLOM OptionROM | Enabled |
Disabled, Enabled |
C245 M8 |
New |
PCIe Slot n Link Speed where n ranges from 1 to 8 |
Auto |
Disabled, Auto, GEN1, GEN2, GEN3, GEN4, GEN5 |
C245 M8 |
New |
PCIe Slot n OptionROM where n ranges from 1 to 8 | Enabled |
Disabled, Enabled |
C245 M8 |
New |
MRAID n Link Speed where n ranges from 1 to 2 |
Auto |
Disabled, Auto, GEN1, GEN2, GEN3, GEN4, GEN5 |
C245 M8 |
New |
MRAID n OptionROM where n ranges from 1 to 2 |
Enabled |
Disabled, Enabled |
C245 M8 |
New |
Front NVME n Link Speed where n ranges from 1 to 4 |
Auto |
Disabled, Auto, GEN1, GEN2, GEN3, GEN4, GEN5 |
C245 M8 |
New |
Front NVME n OptionROM where n ranges from 1 to 4 |
Enabled |
Disabled, Enabled |
C245 M8 |
New |
Rear NVME n Link Speed where n ranges from 1 to 4 |
Auto |
Disabled, Auto, GEN1, GEN2, GEN3, GEN4, GEN5 |
C245 M8 |
New |
Rear NVME n OptionROMwhere n ranges from 1 to 4 |
Enabled |
Enabled, Disabled |
C245 M8 |
New |
PCIe Slot MSTOR Link Speed |
Auto |
Disabled, Auto, GEN1, GEN2, GEN3, GEN4, GEN5 |
C245 M8 |
New |
PCIe Slot MSTOR RAID OptionROM |
Enabled |
Enabled, Disabled |
C245 M8 |
New |
VGA Priority |
Onboard |
Offboard, Onboard, Onboard VGA Disabled |
C245 M8 |
New |
FRB 2 Timer |
Enabled |
Enabled, Disabled |
C245 M8 |
New |
OS Watchdog Timer Policy | Power-off | Power-off, Reset |
C245 M8 |
New |
OS Boot Watchdog Timer Timeout |
10 minutes |
5 minutes, 10 minutes, 15 minutes, 20 minutes |
C245 M8 |
New |
OS Boot Watchdog Timer |
Disabled |
Enabled, Disabled |
C245 M8 |
New |
Flow Control | None | None, RTC-CTS |
C245 M8 |
New |
Baud Rate | 115.2k |
9.6k, 19.2k, 38.4k, 57.6k, 115.2k |
C245 M8 |
New |
Terminal type | VT100 |
PC-ANSI, VT100, VT100-PLUS, VT-UTF8 |
C245 M8 |
New |
Console Redirection |
Disabled |
COM 0, COM 1, Disabled |
C245 M8 |
New |
Security Device Support | Enabled |
Enabled, Disabled |
C245 M8 |
New |
Trusted Platform Module State | Enabled |
Enabled, Disabled |
C245 M8 |
New |
SHA-1 PCR Bank |
Disabled |
Enabled, Disabled |
C245 M8 |
New |
SHA256 PCR Bank |
Enabled |
Enabled, Disabled |
C245 M8 |
New |
SHA384 PCR Bank | Disabled |
Enabled, Disabled |
C245 M8 |
New |
Above 4G Decoding |
Enabled |
Enabled, Disabled |
C245 M8 |
New |
CDN Control |
Enabled |
Enabled, Disabled |
C245 M8 |
New |
PCIe Slots CDN Control where CDN refers to Consistent Device Naming |
Disabled |
Enabled, Disabled |
C245 M8 |
New |
Power ON Password |
Disabled |
Enabled, Disabled |
C245 M8 |
New |
Core Performance Boost |
Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
Global C-state Control | Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
L1 Stream HW Prefetcher |
Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
L2 Stream HW Prefetcher |
Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
NUMA Nodes per Socket | Auto |
NPS0, NPS1, NPS2, NPS4, Auto |
C245 M8 |
New |
Chipselect Interleaving |
Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
Bank Group Swap |
Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
Determinism Slider | Auto |
Auto, Performance, Power |
C245 M8 |
New |
IPv4 PXE Support |
Enabled |
Enabled, Disabled |
C245 M8 |
New |
IPv6 PXE Support |
Enabled |
Enabled, Disabled |
C245 M8 |
New |
IOMMU |
Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
SMT Mode |
Enabled |
Enabled, Disabled, Auto |
C245 M8 |
New |
SVM Mode |
Enabled |
Enabled, Disabled |
C245 M8 |
New |
CPU Downcore control F19 M10h-1Fh where F refers to the processor family and M denotes the model |
Auto |
Auto, ONE (1 + 0), TWO (2 + 0), THREE (3 + 0), FOUR (4 + 0), FIVE (5 + 0), SIX (6 + 0), SEVEN (7 + 0) |
C245 M8 |
New |
Downcore control F19 MA0h-AFh where F refers to the processor family and M denotes the model |
Auto |
Auto, TWO (1 + 1), FOUR (2 + 2), SIX (3 + 3), EIGHT (4 + 4), TEN (5 + 5), TWELVE (6 + 6), FOURTEEN (7 + 7) |
C245 M8 |
New |
SR-IOV Support | Enabled |
Enabled, Disabled |
C245 M8 |
New |
SMEE |
Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
BIOS Techlog Level |
Minimum |
Maximum, Minimum, Normal |
C245 M8 |
New |
OptionROM Launch Optimization |
Enabled |
Enabled, Disabled |
C245 M8 |
New |
PCIe ARI Support |
Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
Re-Size BAR Support |
Enabled |
Enabled, Disabled |
C245 M8 |
New |
TSME |
Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
IPv4 HTTP Support |
Enabled |
Enabled, Disabled |
C245 M8 |
New |
IPv6 HTTP Support |
Enabled |
Enabled, Disabled |
C245 M8 |
New |
Network Stack |
Enabled |
Enabled, Disabled |
C245 M8 |
New |
SEV-SNP Support |
Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
CPPC |
Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
Power Profile Selection F19h where F refers to the processor family and M denotes the model |
High Performance Mode |
High Performance Mode, Efficiency Mode, Maximum IO Performance Mode, Balanced Memory Performance Mode |
C245 M8 |
New |
SNP Memory Coverage |
Auto |
Auto, Enabled, Disabled, Custom |
C245 M8 |
New |
SNP Memory Size to Cover in MB |
8192 |
0 - 1048576 |
C245 M8 |
New |
BME DMA Mitigation |
Disabled |
Enabled, Disabled |
C245 M8 |
New |
Post Package Repair | Hard PPR |
Disabled, Hard PPR |
C245 M8 |
New |
Runtime Post Package Repair |
Disabled |
Enabled, Disabled |
C245 M8 |
New |
Burst and Postponed Refresh |
Disabled |
Enabled, Disabled |
C245 M8 |
New |
APBDIS |
Auto |
0, 1, Auto |
C245 M8 |
New |
Fixed SOC P-State SP5 F19h where F refers to the processor family |
0 |
0 - 2 |
C245 M8 |
New |
CCD Control |
Auto |
Auto, 2 CCDs, 4 CCDs, 6 CCDs, 8 CCDs, 10 CCDs |
C245 M8 |
New |
Streaming Stores Control |
Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
ACPI SRAT L3 Cache As NUMA Domain |
Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
DF C-States |
Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
SEV-ES ASID Space Limit |
1 |
1- 1007 |
C245 M8 |
New |
Local APIC Mode |
Auto |
Compatibility, XAPIC, X2APIC, Auto |
C245 M8 |
New |
DRAM Scrub Time |
24 hours |
Disabled, 1 hour, 4 hours, 6 hours, 8 hours, 12 hours,16 hours, 24 hours, 48 hours, Auto |
C245 M8 |
New |
PCIe Ten Bit Tag Support |
Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
4-link xGMI max speed | Auto |
20 Gbps, 25 Gbps, 32 Gbps, Auto |
C245 M8 |
New |
Memory Interleaving |
Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
DF PState Frequency Optimizer |
Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
AVX512 |
Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
Power Down Enable |
Auto |
Enabled, Disabled, Auto |
C245 M8 |
New |
xGMI Force Link Width |
Auto |
Auto, 0, 1, 2 |
C245 M8 |
New |
Memory Refresh Rate |
1x Refresh |
1x Refresh, 2x Refresh |
C245 M8 |
New |