Turbo Boost
|
Whether
the processor uses Intel Turbo Boost Technology, which allows the processor to
automatically increase its frequency if it is running below power, temperature,
or voltage specifications. This can be one of the following:
-
disabled—The processor does not increase its
frequency automatically.
-
enabled—The processor uses Turbo Boost Technology if
required.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
|
Enhanced Intel Speedstep
|
Whether
the processor uses Enhanced Intel SpeedStep Technology, which allows the system
to dynamically adjust processor voltage and core frequency. This technology can
result in decreased average power consumption and decreased average heat
production. This can be one of the following:
-
disabled—The processor never dynamically adjusts its
voltage or frequency.
-
enabled—The processor utilizes Enhanced Intel
SpeedStep Technology and enables all supported processor sleep states to
further conserve power.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
We
recommend that you contact your operating system vendor to make sure your
operating system supports this feature.
|
Hyper Threading
|
Whether
the processor uses Intel Hyper-Threading Technology, which allows multithreaded
software applications to execute threads in parallel within each processor.
This can be one of the following:
-
disabled—The processor does not permit
hyperthreading.
-
enabled—The processor allows for the parallel
execution of multiple threads.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
We
recommend that you contact your operating system vendor to make sure the
operating system supports this feature.
|
Core Multi Processing
|
Sets the
state of logical processor cores per CPU in a package. If you disable this
setting, Intel Hyper Threading technology is also disabled. This can be one of
the following:
-
all—Enables multiprocessing on all logical processor
cores.
-
1 through
n—Specifies the number of logical
processor cores per CPU that can run on the server. To disable multiprocessing
and have only one logical processor core per CPU running on the server, choose
1.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
We
recommend that you contact your operating system vendor to make sure your
operating system supports this feature.
|
Execute Disabled Bit
|
Classifies memory areas on the server to specify where the
application code can execute. As a result of this classification, the processor
disables code execution if a malicious worm attempts to insert code in the
buffer. This setting helps to prevent damage, worm propagation, and certain
classes of malicious buffer overflow attacks. This can be one of the following:
-
disabled—The processor does not classify memory
areas.
-
enabled—The processor classifies memory areas.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
We
recommend that you contact your operating system vendor to make sure your
operating system supports this feature.
|
Virtualization Technology (VT)
|
Whether
the processor uses Intel Virtualization Technology, which allows a platform to
run multiple operating systems and applications in independent partitions. This
can be one of the following:
-
disabled—The processor does not permit
virtualization.
-
enabled—The processor allows multiple operating
systems in independent partitions.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
Note
|
If you
change this option, you must power cycle the server before the setting takes
effect.
|
|
Hardware Pre-fetcher
|
Whether the processor allows the Intel hardware prefetcher to
fetch streams of data and instruction from memory into the unified second-level
cache when necessary. This can be one of the following:
-
Disabled—The hardware prefetcher is not used.
-
Enabled—The processor uses the hardware prefetcher
when cache issues are detected.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
Note
|
must be set to
Custom in order to specify this value. For any value
other than
Custom, this option is overridden by the setting in
the selected CPU performance profile.
|
|
Adjacent Cache Line Pre-fetcher
|
Whether the processor
fetches cache lines in even/odd pairs instead of fetching just the required
line. This can be one of the following:
-
Disabled—The processor only fetches the required
line.
-
Enabled—The processor fetches both the required line
and its paired line.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
Note
|
must be set to
Custom in order to specify this value. For any value
other than
Custom, this option is overridden by the setting in
the selected CPU performance profile.
|
|
DCU Streamer Pre-fetch
|
Whether the processor uses the DCU IP Prefetch mechanism to
analyze historical cache access patterns and preload the most relevant lines in
the L1 cache. This can be one of the following:
-
Disabled—The processor does not try to anticipate
cache read requirements and only fetches explicitly requested lines.
-
Enabled—The DCU prefetcher analyzes the cache read
pattern and prefetches the next line in the cache if it determines that it may
be needed.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
|
DCU IP Pre-fetcher
|
Whether the processor uses the DCU IP Prefetch mechanism to
analyze historical cache access patterns and preload the most relevant lines in
the L1 cache. This can be one of the following:
-
Disabled—The processor does not preload any cache
data.
-
Enabled—The DCU IP prefetcher preloads the L1 cache
with the data it determines to be the most relevant.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
|
Direct Cache Access
|
Allows
processors to increase I/O performance by placing data from I/O devices
directly into the processor cache. This setting helps to reduce cache misses.
This can be one of the following:
-
disabled—Data from I/O devices is not placed
directly into the processor cache.
-
enabled—Data from I/O devices is placed directly
into the processor cache.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
|
Processor C State
|
Whether
the system can enter a power savings mode during idle periods. This can be one
of the following:
-
disabled—The system remains in a high-performance
state even when idle.
-
enabled—The system can reduce power to system
components such as the DIMMs and CPUs.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
We
recommend that you contact your operating system vendor to make sure your
operating system supports this feature.
|
Processor C1E
|
Allows
the processor to transition to its minimum frequency upon entering C1. This
setting does not take effect until after you have rebooted the server. This can
be one of the following:
-
disabled—The CPU continues to run at its maximum
frequency in the C1 state.
-
enabled—The CPU transitions to its minimum
frequency. This option saves the maximum amount of power in the C1 state.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
|
Processor C3 Report
|
Whether
the processor sends the C3 report to the operating system. This can be one of
the following:
-
disabled—The processor does not send the C3 report.
-
acpi-c2—The processor sends the C3 report using the
advanced configuration and power interface (ACPI) C2 format.
-
acpi-c3—The processor sends the C3 report using the
ACPI C3 format.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
On the
Cisco UCS B440 Server, the BIOS Setup menu uses enabled and disabled for these
options. If you specify acpi-c2 or acpi-c2, the server sets the BIOS value for
that option to enabled.
|
Processor C6 Report
|
Whether
the processor sends the C6 report to the operating system. This can be one of
the following:
-
disabled—The processor does not send the C6 report.
-
enabled—The processor sends the C6 report.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
|
Processor C7 Report
|
Whether
the processor sends the C7 report to the operating system. This can be one of
the following:
-
disabled—The processor does not send the C7 report.
-
enabled—The processor sends the C7 report.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
|
CPU Performance
|
Sets the
CPU performance profile for the server. This can be one of the following:
-
enterprise—For M3 servers, all prefetchers and data
reuse are enabled. For M1 and M2 servers, data reuse and the DCU IP prefetcher
are enabled, and all other prefetchers are disabled.
-
high-throughput—Data reuse and the DCU IP prefetcher
are enabled, and all other prefetchers are disabled.
-
hpc—All prefetchers are enabled and data reuse is
disabled. This setting is also known as high-performance computing.
|
Max Variable MTRR Setting
|
Allows
you to select the number of mean time to repair (MTRR) variables. This can be
one of the following:
-
auto-max—BIOS uses the default value for the
processor.
-
8—BIOS uses the number specified for the variable
MTRR.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
|
Local X2 APIC
|
Allows
you to set the type of Application Policy Infrastructure Controller (APIC)
architecture. This can be one of the following:
-
xapic—Uses the standard xAPIC architecture.
-
x2apic—Uses the enhanced x2APIC architecture to
support 32 bit addressability of processors.
-
auto—Automatically uses the xAPIC architecture that
is detected.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
|
Power Technology
|
Enables you to configure the CPU power management settings for
the following options:
Power Technology can be one
of the following:
-
Disabled—The server does not perform any CPU power
management and any settings for the BIOS parameters mentioned above are
ignored.
-
—The server determines the best
settings for the BIOS parameters mentioned above and ignores the individual
settings for these parameters.
-
Performance—The server automatically optimizes the
performance for the BIOS parameters mentioned above.
-
Custom—The server uses the individual settings for
the BIOS parameters mentioned above. You must select this option if you want to
change any of these BIOS parameters.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
|
Energy Performance
|
Allows you to determine whether system performance or energy
efficiency is more important on this server. This can be one of the following:
Note
|
must be set to
Custom or the server ignores the setting for this
parameter.
|
|
Frequency Floor Override
|
Whether the CPU is allowed to drop below the maximum non-turbo
frequency when idle. This can be one of the following:
-
Disabled— The CPU can drop below the maximum
non-turbo frequency when idle. This option decreases power consumption but may
reduce system performance.
-
Enabled— The CPU cannot drop below the maximum
non-turbo frequency when idle. This option improves system performance but may
increase power consumption.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
|
P-STATE Coordination
|
Allows you to define how BIOS communicates the P-state support
model to the operating system. There are 3 models as defined by the Advanced
Configuration and Power Interface (ACPI) specification.
-
HW_ALL—The processor hardware is responsible for
coordinating the P-state among logical processors with dependencies (all
logical processors in a package).
-
SW_ALL—The OS Power Manager (OSPM) is responsible
for coordinating the P-state among logical processors with dependencies (all
logical processors in a physical package), and must initiate the transition on
all of the logical processors.
-
SW_ANY—The OS Power Manager (OSPM) is responsible
for coordinating the P-state among logical processors with dependencies (all
logical processors in a package), and may initiate the transition on any of the
logical processors in the domain.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
Note
|
must be set to
Custom or the server ignores the setting for this
parameter.
|
|
DRAM Clock Throttling
|
Allows you to tune the system settings between the memory
bandwidth and power consumption. This can be one of the following:
-
Balanced— DRAM clock throttling is reduced,
providing a balance between performance and power.
-
Performance—DRAM clock throttling is disabled,
providing increased memory bandwidth at the cost of additional power.
-
—DRAM clock throttling is increased
to improve energy efficiency.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
|
Channel Interleaving
|
Whether the CPU divides memory blocks and spreads contiguous
portions of data across interleaved channels to enable simultaneous read
operations. This can be one of the following:
-
Auto—The CPU determines what interleaving is done.
-
1-way—Some channel interleaving is used.
-
2-way
-
3-way
-
4-way—The maximum amount of channel interleaving is
used.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
|
Rank Interleaving
|
Whether the CPU interleaves physical ranks of memory so that one
rank can be accessed while another is being refreshed. This can be one of the
following:
-
Auto—The CPU determines what interleaving is done.
-
1-way—Some rank interleaving is used.
-
2-way
-
4-way
-
8-way—The maximum amount of rank interleaving is
used.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
|
Demand Scrub
|
Whether the system corrects single bit memory errors
encountered when the CPU or I/O makes a demand read. This can be one of the
following:
-
Disabled— Single bit memory errors are not
corrected.
-
Enabled— Single bit memory errors are corrected in
memory and the corrected data is set in response to the demand read.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
|
Patrol Scrub
|
Whether the system actively searches for, and corrects, single
bit memory errors even in unused portions of the memory on the server. This can
be one of the following:
-
Disabled—The system checks for memory ECC errors
only when the CPU reads or writes a memory address.
-
Enabled—The system periodically reads and writes
memory searching for ECC errors. If any errors are found, the system attempts
to fix them. This option may correct single bit errors before they become
multi-bit errors, but it may adversely affect performance when the patrol scrub
is running.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
|
Altitude
|
The
approximate number of meters above sea level at which the physical server is
installed. This can be one of the following:
-
Auto—The CPU determines the physical elevation.
-
—The server is approximately 300 meters above
sea level.
-
—The server is approximately 900 meters above
sea level.
-
—The server is approximately 1500 meters above
sea level.
-
—The server is approximately 3000 meters above
sea level.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
|
Package C State
Limit
|
The
amount of power available to the server components when they are idle. This can
be one of the following:
-
—The
server may enter any available C state.
-
—The server
provides all server components with full power at all times. This option
maintains the highest level of performance and requires the greatest amount of
power.
-
—When the CPU
is idle, the system slightly reduces the power consumption. This option
requires less power than C0 and allows the server to return quickly to high
performance mode.
-
—When the CPU
is idle, the system reduces the power consumption further than with the C1
option. This requires less power than C1 or C0, but it takes the server
slightly longer to return to high performance mode.
-
—When the CPU
is idle, the system reduces the power consumption further than with the C3
option. This option saves more power than C0, C1, or C3, but there may be
performance issues until the server returns to full power.
-
—When the CPU
is idle, the system reduces the power consumption further than with the C1
option. This requires less power than C1 or C0, but it takes the server
slightly longer to return to high performance mode.
-
—When the CPU
is idle, the server makes a minimal amount of power available to the
components. This option saves the maximum amount of power but it also requires
the longest time for the server to return to high performance mode.
-
—When the
CPU is idle, the server makes a minimal amount of power available to the
components. This option saves more power than C7, but it also requires the
longest time for the server to return to high performance mode.
-
—The
BIOS uses the value for this attribute contained in the BIOS defaults for the
server type and vendor.
|