- Preface
- Product Overview
- Command-line Interfaces
- Configuring the Switch for the First Time
- Administering the Switch
- Configuring the Cisco IOS In Service Software Upgrade Process
- Configuring Interfaces
- Checking Port Status and Connectivity
- Configuring Supervisor Engine Redundancy Using RPR and SSO
- Configuring Cisco NSF with SSO Supervisor Engine Redundancy
- Environmental Monitoring and Power Management
- Configuring Power over Ethernet
- Configuring the Catalyst 4500 Series Switch with Cisco Network Assistant
- Configuring VLANs, VTP, and VMPS
- Configuring IP Unnumbered Interface
- Configuring Layer 2 Ethernet Interfaces
- Configuring SmartPort Macros
- Configuring STP and MST
- Configuring Flex Links and the MAC Address-Table Move Update Feature
- Configuring Resilient Ethernet Protocol
- Configuring Optional STP Features
- Configuring EtherChannels
- Configuring IGMP Snooping and Filtering
- Configuring IPv6 MLD Snooping
- Configuring 802.1Q and Layer 2 Protocol Tunneling
- Configuring CDP
- Configuring LLDP and LLDP-MED
- Configuring UDLD
- Configuring Unidirectional Ethernet
- Configuring Layer 3 Interfaces
- Configuring Cisco Express Forwarding
- Configuring Unicast Reverse Path Forwarding
- Configuring IP Multicast
- Configuring ANCP Client
- Configuring Policy-Based Routing
- Configuring VRF-lite
- Configuring Quality of Service
- Configuring Voice Interfaces
- Configuring Private VLANs
- Configuring 802.1X Port-Based Authentication
- Configuring PPPoE Intermediate Agent
- Configuring Web-Based Authentication
- Configuring Port Security
- Configuring Control Plane Policing
- Configuring DHCP Snooping, IP Source Guard, and IPSG for Static Hosts
- Configuring Dynamic ARP Inspection
- Configuring Network Security with ACLs
- Port Unicast and Multicast Flood Blocking
- Configuring Storm Control
- Configuring SPAN and RSPAN
- Configuring System Message Logging
- Configuring SNMP
- Configuring NetFlow
- Configuring Ethernet CFM and OAM
- Configuring Y.1731 (AIS and RDI)
- Configuring Cisco IOS IP SLAs Operations
- Configuring RMON
- Performing Diagnostics
- Configuring WCCP Version 2 Services
- ROM Monitor
- Configuring MIB Support
- Acronyms
- Index
Performing Diagnostics
Diagnostics tests and verifies the functionality of the hardware components of your system (chassis, supervisor engines, modules, and ASICs), while your Catalyst 4500 series switch is connected to a live network. Diagnostics consists of packet switching tests that test hardware components and verify the data path and control signals. Diagnostic tests are non-disruptive (except POST) and run at different times. Some tests run continuously in the background to monitor the status of your system (such as the test for switching modules), while others run only once.
This chapter describes the following types of diagnostics on the Catalyst 4500 series switch:
•
Power-On-Self-Test Diagnostics
Note For complete syntax and usage information for the switch commands used in this chapter, look at the Cisco Catalyst 4500 Series Switch Command Reference and related publications at this location:
http://www.cisco.com/en/US/products/hw/switches/ps4324/index.html
If the command is not found in the Catalyst 4500 Command Reference, it is located in the larger Cisco IOS library. Refer to the Catalyst 4500 Series Switch Cisco IOS Command Reference and related publications at this location:
http://www.cisco.com/en/US/products/ps6350/index.html
Online Diagnostics
An online diagnostic test verifies that all ports on a linecard are working correctly. The test can detect whether the path to the front panel port on the linecard is broken, but it cannot indicate where along the path the problem occurred.
The test is termed online because it runs when your system is running.
Note This test is run only for linecards that have stub chips.
Online diagnostics runs on linecards only once, when they are booting.
This can happen when you insert a linecard or power up a chassis.
Online diagnostics are performed by sending a packet from the CPU to every port on the linecard. Because this packet is marked loopback, the CPU expects to see this packet return from the port. The packet first traverses the ASICs on the supervisor engine card, then travels via the chassis backplane and the stub chip on the linecards to the PHYs. The PHY sends it back down the same path.
Note The packet does not reach or exit the front panel port.
Troubleshooting with Online Diagnostics
A faulty linecard occurs if any of the following conditions occurs.
•All ports fail
•All ports on a stub chip fail
•Only one port fails
For all of the above situations, the output of the show module command would display the status of the linecard as faulty:
Switch# show mod
Chassis Type : WS-C4507R
Power consumed by backplane : 40 Watts
Mod Ports Card Type Model Serial No.
---+-----+--------------------------------------+------------------+-----------
1 6 Sup II+10GE 10GE (X2), 1000BaseX (SFP) WS-X4013+10GE JAB091502G0
2 6 Sup II+10GE 10GE (X2), 1000BaseX (SFP) WS-X4013+10GE JAB091502FC
3 48 100BaseX (SFP) WS-X4248-FE-SFP JAB093305RP
4 48 10/100BaseTX (RJ45)V WS-X4148-RJ45V JAE070717E5
5 48 10/100BaseTX (RJ45)V WS-X4148-RJ45V JAE061303U3
6 48 10/100BaseTX (RJ45)V WS-X4148-RJ45V JAE061303WJ
7 24 10/100/1000BaseT (RJ45)V, Cisco/IEEE WS-X4524-GB-RJ45V JAB0815059Q
M MAC addresses Hw Fw Sw Status
--+--------------------------------+---+------------+----------------+---------
1 000b.5f27.8b80 to 000b.5f27.8b85 0.2 12.2(27r)SG( 12.2(37)SG Ok
2 000b.5f27.8b86 to 000b.5f27.8b8b 0.2 12.2(27r)SG( 12.2(37)SG Ok
3 0005.9a80.6810 to 0005.9a80.683f 0.4 Ok
4 000c.3016.aae0 to 000c.3016.ab0f 2.6 Ok
5 0008.a3a3.4e70 to 0008.a3a3.4e9f 1.6 Ok
6 0008.a3a3.3fa0 to 0008.a3a3.3fcf 1.6 Faulty
7 0030.850e.3e78 to 0030.850e.3e8f 1.0 Ok
Mod Redundancy role Operating mode Redundancy status
----+-------------------+-------------------+----------------------------------
1 Active Supervisor SSO Active
2 Standby Supervisor SSO Standby hot
To troubleshoot a faulty linecard, do the following:
Step 1 Enter the command show diagnostic result module 3.
If a faulty linecard was inserted in the chassis, it would have failed diagnostics and the output would be similar to the following:
Diagnostic[module 3]: Diagnostic handle is not found for the card.
module 3:
Overall diagnostic result: PASS
Test results: (. = Pass, F = Fail, U = Untested)
1) linecard-online-diag --------------------> F
RMA the linecard, contact TAC, and skip steps 2 & 3.
However, if the output shows the following:
module 3:
Overall diagnostic result: PASS
Test results: (. = Pass, F = Fail, U = Untested)
1) linecard-online-diag --------------------> .
The linecard passed online diagnostics either 1) when it was inserted into the chassis the last time or 2) when the switch was powered up (as reported by the "."). Further investigation is required.
Step 2 Insert a different supervisor engine card and re-insert the linecard.
If the linecard passes the test, it suggests that the supervisor engine card is defective.
RMA the supervisor engine, contact TAC, and skip step 3.
Because online diagnostics is not run on the supervisor engine card(s), so you cannot use the
#show diagnostic module 1 command to test whether the supervisor engine card is faulty.
Step 3 Re-insert the linecard in a different chassis.
If the linecard passes the test, the problem is associated with the chassis.
RMA the chassis and contact TAC.
Power-On-Self-Test Diagnostics
The following topics are discussed:
•Power-On-Self-Test Results for Supervisor Engine V-10GE
•Causes of Failure and Troubleshooting
Overview
All Catalyst 4500 series switches have power-on-self-test (POST) diagnostics that run whenever a supervisor engine boots. POST tests the basic hardware functionality for the supervisor switching engine, its associated packet memory and other on board hardware components. The results of POST impacts how the switch boots, as the health of the supervisor engine is critical to the operation of the switch. The switch might boot in a marginal or faulty state.
POST is currently supported on the following supervisor engines:
•WS-X4014
•WS-X4515
•WS-X4516
•WS-X4516-10GE
•WS-X4013+
•WS-X4013+TS
•WS-X4013+10GE
•WS-C4948G
•WS-C4948G-10GE
•ME-4924-10GE
•WS-X45-SUP6-E
The POST results are indicated with a '.' or a `Pass' for Pass, an 'F' for a `Fail' and a 'U' for Untested.
Sample POST Results
For all the supervisor engines, POST performs CPU, traffic, system, system memory, and feature tests.
For CPU tests, POST verifies appropriate activity of the supervisor SEEPROM, temperature sensor, and Ethernet-end-of-band channel (eobc), when used.
The following example illustrates the output of a CPU subsystem test on all supervisor engines except the WS-X4013+TS:
[..]
Cpu Subsystem Tests ...
seeprom: . temperature_sensor: . eobc: .
[..]
The following example illustrates the output of a CPU subsystem test on a WS-X4013+TS supervisor engine.
[..]
Cpu Subsystem Tests ...
seeprom: . temperature_sensor: .
[..]
For traffic tests, POST sends packets from the CPU to the switch. These packets loop several times within the switch core and validate the switching, the Layer 2 and the Layer 3 functionality. To isolate the hardware failures accurately, the loop back is done both inside and outside the switch ports.
The following example illustrates the output of a Layer 2 traffic test at the switch ports on the supervisor engines WS-X4516, WS-X4516-10GE, WS-X4013+10GE, WS-C4948G-10GE:
Port Traffic: L2 Serdes Loopback ...
0: . 1: . 2: . 3: . 4: . 5: . 6: . 7: . 8: . 9: . 10: . 11: .
12: . 13: . 14: . 15: . 16: . 17: . 18: . 19: . 20: . 21: . 22: . 23: .
24: . 25: . 26: . 27: . 28: . 29: . 30: . 31: . 32: . 33: . 34: . 35: .
36: . 37: . 38: . 39: . 40: . 41: . 42: . 43: . 44: . 45: . 46: . 47: .
The following example illustrates the output of a Layer 2 traffic test at the switch ports on the supervisor engines WS-X4013+TS, WS-X4515, WS-X4013+, WS-X4014, WS-C4948G:
Port Traffic: L2 Serdes Loopback ...
0: . 1: . 2: . 3: . 4: . 5: . 6: . 7: . 8: . 9: . 10: . 11: .
12: . 13: . 14: . 15: . 16: . 17: . 18: . 19: . 20: . 21: . 22: . 23: .
24: . 25: . 26: . 27: . 28: . 29: . 30: . 31:
POST also performs tests on the packet and system memory of the switch. These are numbered dynamically in ascending order starting with 1 and represent different memories.
The following example illustrates the output from a system memory test:
Switch Subsystem Memory ...
1: . 2: . 3: . 4: . 5: . 6: . 7: . 8: . 9: . 10: . 11: . 12: .
13: . 14: . 15: . 16: . 17: . 18: . 19: . 20: . 21: . 22: . 23: . 24: .
25: . 26: . 27: . 28: . 29: . 30: . 31: . 32: . 33: . 34: . 35: . 36: .
37: . 38: . 39: . 40: . 41: . 42: . 43: . 44: . 45: . 46: . 47: . 48: .
49: . 50: . 51: . 52: . 53: . 54: . 55: .
POST also tests the Netflow services card (Supervisor Engine IV and Supervisor Engine V) and the Netflow services feature (Supervisor Engine V -10GE). Failures from these tests are treated as marginal, as they do not impact functionality of the switch (except for the unavailability of the Netflow features):
Netflow Services Feature ...
se: . cf: . 52: . 53: . 54: . 55: . 56: . 57: . 58: . 59: . 60: . 61: .
62: . 63: . 64: . 65: .
Note Supervisor Engine VI-E retains most of the previous supervisors' POST features including the CPU subsystem tests, Layer 3 and Layer 2 traffic tests, and memory tests. Redundant ports on redundant systems are not tested. All POST diagnostics are local to the supervisor running the tests.
The following example shows the output for a WS-X4516 supervisor engine:
Switch# show diagnostic result module 2 detail
module 2:
Overall diagnostic result: PASS
Test results: (. = Pass, F = Fail, U = Untested)
___________________________________________________________________________
1) supervisor-bootup -----------------------> .
Error code --------------------------> 0 (DIAG_SUCCESS)
Total run count ---------------------> 1
Last test execution time ------------> Jul 20 2005 14:15:52
First test failure time -------------> n/a
Last test failure time --------------> n/a
Last test pass time -----------------> Jul 20 2005 14:15:52
Total failure count -----------------> 0
Consecutive failure count -----------> 0
Power-On-Self-Test Results for ACTIVE Supervisor
Power-on-self-test for Module 2: WS-X4516
Port/Test Status: (. = Pass, F = Fail, U = Untested)
Reset Reason: PowerUp RemoteDebug
Cpu Subsystem Tests ...
seeprom: . temperature_sensor: . eobc: .
Port Traffic: L2 Serdes Loopback ...
0: . 1: . 2: . 3: . 4: . 5: . 6: . 7: . 8: . 9: . 10: . 11: .
12: . 13: . 14: . 15: . 16: . 17: . 18: . 19: . 20: . 21: . 22: . 23: .
24: . 25: . 26: . 27: . 28: . 29: . 30: . 31: . 32: . 33: . 34: . 35: .
36: . 37: . 38: . 39: . 40: . 41: . 42: . 43: . 44: . 45: . 46: . 47: .
Port Traffic: L2 Asic Loopback ...
0: . 1: . 2: . 3: . 4: . 5: . 6: . 7: . 8: . 9: . 10: . 11: .
12: . 13: . 14: . 15: . 16: . 17: . 18: . 19: . 20: . 21: . 22: . 23: .
24: . 25: . 26: . 27: . 28: . 29: . 30: . 31: . 32: . 33: . 34: . 35: .
36: . 37: . 38: . 39: . 40: . 41: . 42: . 43: . 44: . 45: . 46: . 47: .
Port Traffic: L3 Asic Loopback ...
0: . 1: . 2: . 3: . 4: . 5: . 6: . 7: . 8: . 9: . 10: . 11: .
12: . 13: . 14: . 15: . 16: . 17: . 18: . 19: . 20: . 21: . 22: . 23: .
24: . 25: . 26: . 27: . 28: . 29: . 30: . 31: . 32: . 33: . 34: . 35: .
36: . 37: . 38: . 39: . 40: . 41: . 42: . 43: . 44: . 45: . 46: . 47: .
Switch Subsystem Memory ...
1: . 2: . 3: . 4: . 5: . 6: . 7: . 8: . 9: . 10: . 11: . 12: .
13: . 14: . 15: . 16: . 17: . 18: . 19: . 20: . 21: . 22: . 23: . 24: .
25: . 26: . 27: . 28: . 29: . 30: . 31: . 32: . 33: . 34: . 35: . 36: .
37: . 38: . 39: . 40: . 41: . 42: . 43: . 44: . 45: . 46: . 47: . 48: .
49: . 50: . 51: . 52: . 53: . 54: . 55: .
Module 2 Passed
___________________________________________________________________________
2) packet-memory-bootup --------------------> U
Error code --------------------------> 0 (DIAG_SUCCESS)
Total run count ---------------------> 0
Last test execution time ------------> n/a
First test failure time -------------> n/a
Last test failure time --------------> n/a
Last test pass time -----------------> n/a
Total failure count -----------------> 0
Consecutive failure count -----------> 0
packet buffers on free list: 64557 bad: 0 used for ongoing tests: 979
Exhaustive packet memory tests did not run at bootup.
Bootup test results:5
No errors.
___________________________________________________________________________
3) packet-memory-ongoing -------------------> U
Error code --------------------------> 0 (DIAG_SUCCESS)
Total run count ---------------------> 0
Last test execution time ------------> n/a
First test failure time -------------> n/a
Last test failure time --------------> n/a
Last test pass time -----------------> n/a
Total failure count -----------------> 0
Consecutive failure count -----------> 0
packet buffers on free list: 64557 bad: 0 used for ongoing tests: 979
Packet memory errors: 0 0
Current alert level: green
Per 5 seconds in the last minute:
0 0 0 0 0 0 0 0 0 0
0 0
Per minute in the last hour:
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
Per hour in the last day:
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0
Per day in the last 30 days:
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
Direct memory test failures per minute in the last hour:
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
Potential false positives: 0 0
Ignored because of rx errors: 0 0
Ignored because of cdm fifo overrun: 0 0
Ignored because of oir: 0 0
Ignored because isl frames received: 0 0
Ignored during boot: 0 0
Ignored after writing hw stats: 0 0
Ignored on high gigaport: 0
Ongoing diag action mode: Normal
Last 1000 Memory Test Failures:
Last 1000 Packet Memory errors:
First 1000 Packet Memory errors:
___________________________________________________________________________
Switch#
The following example shows the output for a WS-X45-SUP6-E supervisor engine:
Switch# show diagnostic result module 3 detail
module 3: SerialNo : XXXXXXXXXXX
Overall diagnostic result: PASS
Test results: (. = Pass, F = Fail, U = Untested)
___________________________________________________________________________
1) supervisor-bootup --------------->
Error code ------------------> 0 (DIAG_SUCCESS)
Total run count -------------> 1
Last test execution time ----> Oct 01 2007 17:37:04
First test failure time -----> n/a
Last test failure time ------> n/a
Last test pass time ---------> Oct 01 2007 17:37:04
Total failure count ---------> 0
Consecutive failure count ---> 0
Power-On-Self-Test Results for ACTIVE Supervisor
prod: WS-X45-SUP6-E part: XXXXXXXXX serial: XXXXXXXXXX
Power-on-self-test for Module 3: WS-X45-SUP6-E
Test Status: (. = Pass, F = Fail, U = Untested)
CPU Subsystem Tests ...
seeprom: Pass
Traffic: L3 Loopback ...
Test Results: Pass
Traffic: L2 Loopback ...
Test Results: Pass
Switching Subsystem Memory ...
Packet Memory Test Results: Pass
Module 3 Passed
___________________________________________________________________________
2) linecard-online-diag ------------>
Error code ------------------> 0 (DIAG_SUCCESS)
Total run count -------------> 1
Last test execution time ----> Oct 01 2007 17:37:04
First test failure time -----> n/a
Last test failure time ------> n/a
Last test pass time ---------> Oct 01 2007 17:37:04
Total failure count ---------> 0
Consecutive failure count ---> 0
Slot Ports Card Type Diag Status Diag Details
---- ----- -------------------------------------- ---------------- ------------
3 6 Sup 6-E 10GE (X2), 1000BaseX (SFP) Skipped Packet memory
Detailed Status
---------------
. = Pass U = Unknown
L = Loopback failure S = Stub failure
P = Port failure
E = SEEPROM failure G = GBIC integrity check failure
Ports 1 2 3 4 5 6
. . . . . .
___________________________________________________________________________
Switch#
Power-On-Self-Test Results for Supervisor Engine V-10GE
For the Supervisor Engine V-10GE (WS-X4516-10GE), POST tests extra redundancy features on the 10-gigabit ports.
The following topics are discussed:
•POST on the Active Supervisor Engine
•Sample POST Results on an Active Supervisor Engine
•POST on Standby Supervisor Engine
•Sample Display of the POST on Standby Supervisor Engine
POST on the Active Supervisor Engine
The active supervisor engine tests the remote redundant 10-gigabit ports on the standby supervisor engine if it is present when the active supervisor engine is booting. The status of the port is displayed as
"Remote TenGigabit Port Status." If no standby supervisor engine is present, the remote port status is always displayed as "Untested." It persists even after a new standby supervisor engine is inserted. The remaining tests are conducted using only the gigabit ports' configuration.
After the active supervisor engine has completed the boot up diagnostics, if the standby supervisor engine is now removed, the remote port status is changed to "Untested" in the overall diagnostic results.
Sample POST Results on an Active Supervisor Engine
Switch# show diagnostic result module 1 detail
module 1:
Overall diagnostic result: PASS
Test results: (. = Pass, F = Fail, U = Untested)
___________________________________________________________________________
1) supervisor-bootup -----------------------> .
Error code --------------------------> 0 (DIAG_SUCCESS)
Total run count ---------------------> 1
Last test execution time ------------> Jul 19 2005 13:28:16
First test failure time -------------> n/a
Last test failure time --------------> n/a
Last test pass time -----------------> Jul 19 2005 13:28:16
Total failure count -----------------> 0
Consecutive failure count -----------> 0
Power-On-Self-Test Results for ACTIVE Supervisor
Power-on-self-test for Module 1: WS-X4516-10GE
Port/Test Status: (. = Pass, F = Fail, U = Untested)
Reset Reason: Software/User
Cpu Subsystem Tests ...
seeprom: . temperature_sensor: . eobc: .
Port Traffic: L3 Serdes Loopback ...
0: . 1: . 2: . 3: . 4: . 5: . 6: . 7: . 8: . 9: . 10: . 11: .
12: . 13: . 14: . 15: . 16: . 17: . 18: . 19: . 20: . 21: . 22: . 23: .
24: . 25: . 26: . 27: . 28: . 29: . 30: . 31: . 32: . 33: . 34: . 35: .
36: . 37: . 38: . 39: . 40: . 41: . 42: . 43: . 44: . 45: . 46: . 47: .
Local 10GE Port 62: .
Local 10GE Port 63: .
Port Traffic: L2 Serdes Loopback ...
0: . 1: . 2: . 3: . 4: . 5: . 6: . 7: . 8: . 9: . 10: . 11: .
12: . 13: . 14: . 15: . 16: . 17: . 18: . 19: . 20: . 21: . 22: . 23: .
24: . 25: . 26: . 27: . 28: . 29: . 30: . 31: . 32: . 33: . 34: . 35: .
36: . 37: . 38: . 39: . 40: . 41: . 42: . 43: . 44: . 45: . 46: . 47: .
48: . 49: . 50: . 51: .
Port Traffic: L2 Asic Loopback ...
0: . 1: . 2: . 3: . 4: . 5: . 6: . 7: . 8: . 9: . 10: . 11: .
12: . 13: . 14: . 15: . 16: . 17: . 18: . 19: . 20: . 21: . 22: . 23: .
24: . 25: . 26: . 27: . 28: . 29: . 30: . 31: . 32: . 33: . 34: . 35: .
36: . 37: . 38: . 39: . 40: . 41: . 42: . 43: . 44: . 45: . 46: . 47: .
48: . 49: . 50: . 51: .
Switch Subsystem Memory ...
1: . 2: . 3: . 4: . 5: . 6: . 7: . 8: . 9: . 10: . 11: . 12: .
13: . 14: . 15: . 16: . 17: . 18: . 19: . 20: . 21: . 22: . 23: . 24: .
25: . 26: . 27: . 28: . 29: . 30: . 31: . 32: . 33: . 34: . 35: . 36: .
37: . 38: . 39: . 40: . 41: . 42: . 43: . 44: . 45: . 46: . 47: . 48: .
49: . 50: . 51: .
Netflow Services Feature ...
se: . cf: . 52: . 53: . 54: . 55: . 56: . 57: . 58: . 59: . 60: . 61: .
62: . 63: . 64: . 65: .
Module 1 Passed
Remote TenGigabitPort status: Passed
___________________________________________________________________________
2) packet-memory-bootup --------------------> U
Error code --------------------------> 0 (DIAG_SUCCESS)
Total run count ---------------------> 0
Last test execution time ------------> n/a
First test failure time -------------> n/a
Last test failure time --------------> n/a
Last test pass time -----------------> n/a
Total failure count -----------------> 0
Consecutive failure count -----------> 0
packet buffers on free list: 64557 bad: 0 used for ongoing tests: 979
Exhaustive packet memory tests did not run at bootup.
Bootup test results:5
No errors.
___________________________________________________________________________
3) packet-memory-ongoing -------------------> U
Error code --------------------------> 0 (DIAG_SUCCESS)
Total run count ---------------------> 0
Last test execution time ------------> n/a
First test failure time -------------> n/a
Last test failure time --------------> n/a
Last test pass time -----------------> n/a
Total failure count -----------------> 0
Consecutive failure count -----------> 0
packet buffers on free list: 64557 bad: 0 used for ongoing tests: 979
Packet memory errors: 0 0
Current alert level: green
Per 5 seconds in the last minute:
0 0 0 0 0 0 0 0 0 0
0 0
Per minute in the last hour:
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
Per hour in the last day:
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0
Per day in the last 30 days:
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
Direct memory test failures per minute in the last hour:
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
Potential false positives: 0 0
Ignored because of rx errors: 0 0
Ignored because of cdm fifo overrun: 0 0
Ignored because of oir: 0 0
Ignored because isl frames received: 0 0
Ignored during boot: 0 0
Ignored after writing hw stats: 0 0
Ignored on high gigaport: 0
Ongoing diag action mode: Normal
Last 1000 Memory Test Failures:
Last 1000 Packet Memory errors:
First 1000 Packet Memory errors:
___________________________________________________________________________
Switch#
POST on Standby Supervisor Engine
Ports 62 and 63 of the supervisor engine always remain Untested or U. Because the Standby supervisor engine never tests the remote 10-gigabit port on the active supervisor engine, the remote 10-gigabit port status on the standby supervisor engine is always Untested. The supervisor engine performs the remaining tests using the gigabit ports' configuration.
Note On redundant chassis, concurrent POST is supported on supervisor engines that are already inserted. However, if a second supervisor engine is inserted while the first one is loading, you might boot the first supervisor engine in a faulty IOS state (POST will abort and some of the POST's tests will be bypassed). This only happens during concurrent bootup of the supervisor engines. So, you should not insert any additional supervisor engines in the empty supervisor engine slot while an already seated supervisor engine is running POST. The Power-On-Self-Test sequence is completed when the "Exiting to ios..." message is displayed.
Sample Display of the POST on Standby Supervisor Engine
Switch# show diagnostic result module 2 detail
module 2:
Overall diagnostic result: PASS
Test results: (. = Pass, F = Fail, U = Untested)
___________________________________________________________________________
1) supervisor-bootup -----------------------> .
Error code --------------------------> 0 (DIAG_SUCCESS)
Total run count ---------------------> 1
Last test execution time ------------> Jul 19 2005 13:29:44
First test failure time -------------> n/a
Last test failure time --------------> n/a
Last test pass time -----------------> Jul 19 2005 13:29:44
Total failure count -----------------> 0
Consecutive failure count -----------> 0
Power-On-Self-Test Results for ACTIVE Supervisor
Power-on-self-test for Module 2: WS-X4516-10GE
Port/Test Status: (. = Pass, F = Fail, U = Untested)
Reset Reason: OtherSupervisor Software/User
Cpu Subsystem Tests ...
seeprom: . temperature_sensor: . eobc: .
Port Traffic: L3 Serdes Loopback ...
0: . 1: . 2: . 3: . 4: . 5: . 6: . 7: . 8: . 9: . 10: . 11: .
12: . 13: . 14: . 15: . 16: . 17: . 18: . 19: . 20: . 21: . 22: . 23: .
24: . 25: . 26: . 27: . 28: . 29: . 30: . 31: . 32: . 33: . 34: . 35: .
36: . 37: . 38: . 39: . 40: . 41: . 42: . 43: . 44: . 45: . 46: . 47: .
Local 10GE Port 62: U
Local 10GE Port 63: U
Port Traffic: L2 Serdes Loopback ...
0: . 1: . 2: . 3: . 4: . 5: . 6: . 7: . 8: . 9: . 10: . 11: .
12: . 13: . 14: . 15: . 16: . 17: . 18: . 19: . 20: . 21: . 22: . 23: .
24: . 25: . 26: . 27: . 28: . 29: . 30: . 31: . 32: . 33: . 34: . 35: .
36: . 37: . 38: . 39: . 40: . 41: . 42: . 43: . 44: . 45: . 46: . 47: .
48: . 49: . 50: . 51: .
Port Traffic: L2 Asic Loopback ...
0: . 1: . 2: . 3: . 4: . 5: . 6: . 7: . 8: . 9: . 10: . 11: .
12: . 13: . 14: . 15: . 16: . 17: . 18: . 19: . 20: . 21: . 22: . 23: .
24: . 25: . 26: . 27: . 28: . 29: . 30: . 31: . 32: . 33: . 34: . 35: .
36: . 37: . 38: . 39: . 40: . 41: . 42: . 43: . 44: . 45: . 46: . 47: .
48: . 49: . 50: . 51: .
Switch Subsystem Memory ...
1: . 2: . 3: . 4: . 5: . 6: . 7: . 8: . 9: . 10: . 11: . 12: .
13: . 14: . 15: . 16: . 17: . 18: . 19: . 20: . 21: . 22: . 23: . 24: .
25: . 26: . 27: . 28: . 29: . 30: . 31: . 32: . 33: . 34: . 35: . 36: .
37: . 38: . 39: . 40: . 41: . 42: . 43: . 44: . 45: . 46: . 47: . 48: .
49: . 50: . 51: .
Netflow Services Feature ...
se: . cf: . 52: . 53: . 54: . 55: . 56: . 57: . 58: . 59: . 60: . 61: .
62: . 63: . 64: . 65: .
Module 2 Passed
Remote TenGigabitPort status: Untested
___________________________________________________________________________
2) packet-memory-bootup --------------------> U
Error code --------------------------> 0 (DIAG_SUCCESS)
Total run count ---------------------> 0
Last test execution time ------------> n/a
First test failure time -------------> n/a
Last test failure time --------------> n/a
Last test pass time -----------------> n/a
Total failure count -----------------> 0
Consecutive failure count -----------> 0
packet buffers on free list: 64557 bad: 0 used for ongoing tests: 979
Exhaustive packet memory tests did not run at bootup.
Bootup test results:5
No errors.
___________________________________________________________________________
3) packet-memory-ongoing -------------------> U
Error code --------------------------> 0 (DIAG_SUCCESS)
Total run count ---------------------> 0
Last test execution time ------------> n/a
First test failure time -------------> n/a
Last test failure time --------------> n/a
Last test pass time -----------------> n/a
Total failure count -----------------> 0
Consecutive failure count -----------> 0
packet buffers on free list: 64557 bad: 0 used for ongoing tests: 979
Packet memory errors: 0 0
Current alert level: green
Per 5 seconds in the last minute:
0 0 0 0 0 0 0 0 0 0
0 0
Per minute in the last hour:
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
Per hour in the last day:
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0
Per day in the last 30 days:
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
Direct memory test failures per minute in the last hour:
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
Potential false positives: 0 0
Ignored because of rx errors: 0 0
Ignored because of cdm fifo overrun: 0 0
Ignored because of oir: 0 0
Ignored because isl frames received: 0 0
Ignored during boot: 0 0
Ignored after writing hw stats: 0 0
Ignored on high gigaport: 0
Ongoing diag action mode: Normal
Last 1000 Memory Test Failures:
Last 1000 Packet Memory errors:
First 1000 Packet Memory errors:
___________________________________________________________________________
Switch#
Note To ensure that the maximum number of ports are tested, ensure that both supervisor engines are present on power-up.
Causes of Failure and Troubleshooting
A failure of any of the POST tests reflects a problem with the hardware on the supervisor engine. IOS boots the supervisor engine with limited functionality, allowing the user to evaluate and display the diagnostic test results.
To evaluate if the hardware failure is persistent, you can power cycle the supervisor engine to rerun the POST tests.
You can also remove and reinsert the supervisor engine into the chassis to ensure that the seating is correct. Please call the Cisco Systems customer support team for more information.
Note On redundant chassis, concurrent POST is supported on supervisor engines that are already inserted. However, if a second supervisor engine is inserted while the first one is loading, you might boot the first supervisor engine in a faulty IOS state (POST will abort and some of the POST's tests will be bypassed). This only happens during concurrent bootup of the supervisor engines. So, you should not insert any additional supervisor engines in the empty supervisor engine slot while an already seated supervisor engine is running POST. The Power-On-Self-Test sequence is completed when the "Exiting to ios..." message is displayed.
Feedback